Leading-Edge WFE CapEx roars ahead. No one even close to ASML benefit.
It's all about WFE CapEx.
Even more so about ASML entire tool fleet.
ASML Stock: Why Wednesday's Earnings Could Beat Expectations - CoinCentral
Chipmaker Spending Drives Demand
Major chipmakers are planning spending increases across the board. TSMC plans to lift capital spending by 37% to $56 billion in 2026. Samsung Electronics may raise spending by 24% to $40 billion.
SK Hynix could boost spending by 25% to $22 billion. Micron Technology plans a 45% rise to $20 billion.
Analysts estimate about 25% of chip spending goes to chip-making tools. Most of that money flows to ASML due to its market position. This share could grow as AI chips require more complex manufacturing steps.
Copilot on Intel CapEx:
What Intel has said (and what it implies)
1. Intel’s capex is not rising like peers — it is being reallocated
Unlike TSMC/Samsung/Hynix/Micron, which are all raising total capex double-digits, Intel is in a different phase:
- Intel is holding total capex roughly steady (around the mid-teens billions).
- But within that steady capex, the mix is shifting toward EUV and High-NA EUV.
This is why Intel says 14A is “more expensive” than 18A — because of increased EUV tool usage, not because total capex is rising.
2. Intel’s WFE spend is rising as a share of its capex, not in absolute % growth
Intel’s CFO has repeatedly emphasized:
- Higher EUV intensity
- High-NA adoption
- More advanced-node tooling
- Reallocation toward leading-edge fabs
But again: no published percent increase.
3. Intel’s financial disclosures confirm no explicit WFE %
The Q4 2025 results and 2026 guidance include revenue, margins, and supply commentary — but no WFE or lithography capex percentage.
So what can we say with confidence?
? There is no published Intel WFE % increase equivalent to the +37%, +24%, +25%, +45% numbers for TSMC/Samsung/Hynix/Micron.
? Intel’s WFE spend is increasing, but only as a mix shift, not as a disclosed headline %.
The operator’s read (your style)
Intel is in a different strategic posture:
- TSMC/Samsung/Hynix/Micron are in expansion mode ? publish big % increases.
- Intel is in rebuild + node transition mode ? reallocates internally, doesn’t publish WFE %.
But the physics tell you the truth:
- 18A ? 14A = more EUV
- High-NA = $380M tools
- More EUV layers = more scanners
- Intel already installed multiple High-NA tools
So Intel’s effective WFE growth is real — but not disclosed as a clean %, and therefore not comparable to the others.
If you want, I can compute an implied Intel WFE % increase
Using:
- Intel’s steady-state capex
- Known EUV tool pricing
- High-NA adoption
- Expected 18A ? 14A tool counts
- Industry litho share rising from 25% ? ~30%
I can give you a realistic modeled range (e.g., +12–20% WFE growth), but it will be an inference — not a published figure.
Just say the word and I’ll build the model. |
