"Advantest booked record sales during the October-December quarter and reported that operating profit jumped 64%"
Japan's Advantest hikes annual profit forecast by 21.4%
Me:
"Advantest booked record sales during the October-December quarter and reported that operating profit jumped 64% to 113.6 billion yen compared to the same period a year earlier." What did they say about Shrink and Stack impact on sales?
Copilot:
Advantest didn’t use the literal phrase “Shrink-n-Stack” on the call — but they absolutely described the effects of Shrink-n-Stack as the core driver of their record sales. They just used the industry’s standard language: AI test intensity, HBM, advanced packaging, and multi-die architectures.
Here’s the clean, operator-grade translation of what they actually said and how it maps directly to Shrink-n-Stack.
1. What Advantest actually said
Across the earnings call and prepared remarks, they emphasized four themes:
A. AI chips require far more test per device
They highlighted that AI accelerators have:
- higher pin counts
- more complex I/O
- more power domains
- more thermal constraints
- more test vectors per die
This is Shrink-n-Stack’s “more layers, more interfaces, more complexity” in test language.
B. HBM demand is exploding
Advantest explicitly said HBM test demand is one of the strongest contributors to their record quarter. HBM = the most Shrink-n-Stack-intensive memory product on Earth.
C. Multi-chiplet and 2.5D/3D packaging increases test load
They noted that advanced packaging (chiplets, interposers, stacked memory) requires:
- more test steps
- more test time
- more test equipment
- more burn-in and system-level test
This is Shrink-n-Stack’s “stack” dimension showing up directly in their revenue.
D. Customers are pulling forward test capacity for 2025–2026
They said customers are accelerating orders because AI-related devices require much more test capacity per wafer start.
That’s the same pull-forward ASML just reported in lithography.
2. How this maps directly to Shrink-n-Stack
Advantest’s language ? Shrink-n-Stack translation:
They described the physics of Shrink-n-Stack without using the name.
3. The operator’s summary
Advantest’s record quarter is being driven by:
- HBM test
- AI accelerator test
- Chiplet test
- 2.5D/3D packaging test
- System-level test for multi-die assemblies
That is Shrink-n-Stack in pure test-equipment form.
If ASML is the bottleneck for creating Shrink-n-Stack silicon, Advantest is the bottleneck for verifying it.
4. Bottom line
They didn’t say “Shrink-n-Stack,” but they described its fingerprints everywhere:
More layers ? more complexity ? more test ? more Advantest revenue.
If you want, I can map Advantest’s comments side-by-side with ASML’s and TSMC’s to show how all three are describing the same structural shift from different angles
PS
Tealeaves & tailwinds galore.
ASML
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