SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : George Gilder - Forbes ASAP

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: JMD who wrote (347)2/28/1998 2:06:00 PM
From: kinkblot  Read Replies (1) of 5853
 
Mike, here's an article from EETimes 8-Dec-97 that discusses chip-level optical interconnects:

techweb.com

Several all-silicon approaches are discussed, but getting a viable silicon emitter in the visible range appears to be the stumbling block. Lucent Bell Labs is working with an AlGaAs / Al oxide process to make two-dimensional VCSEL arrays that would be a layer across the entire chip. This results in lower power dissipation than with present compound semi VCSELs, permitting use on silicon CMOS ICs without burnout. But the Bell Labs approach requires a transfer scheme such as flip-chip.

Board-level VCSEL tranceivers for Gigabit Ethernet and other standards are currently available from Hewlett-Packard and Honeywell MicroSwitch.

Will
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext