Surprise, surprise. Here's the R/D !
From EETimes, Monday 03/18 headlines:
By Ron Wilson
SANTA CLARA, Calif. -- Integrated Device Technology Inc. is opening an entirely new front in
the memory wars with the introduction of Fusion Memory--a DRAM-based memory technology
with SRAM-like speed and near-DRAM density and cost. The company will use the new memory
technology in low-cost SRAM replacements, in specialty memory products and for embedded
memory in CPUs and communications products.
"Basically what we have done is to provide the performance and ease of use of a conventional
four-transistor SRAM cell, but with the density of DRAM," said director of marketing Stewart
Sando. "The technology is flexible--it allows us to make sure we hit the application's performance
target first, then bring the cost down to the levels only possible with a single-transistor DRAM cell."
Sando explained that the technological basis of Fusion Memory was the work IDT has done in
cooperation with MoSys Inc. IDT is the original foundry for the MoSys multibank DRAM.
"We use a very conventional single-transistor, stacked-capacitor DRAM cell," he said. "That
allows us to use a standard 4-Mbit, four-poly, two-metal process. But instead of putting the cells in
one or two huge arrays, we put down a lot of small arrays on the die. The size of each array is
determined by the timing requirements: we keep the bit lines short enough and the sense amps fast
enough to meet whatever speed requirements the application imposes."
These small arrays are then assembled and controlled so that they appear to behave as a single
SRAM-like device. RAS/CAS timing and refresh are essentially hidden from the outside of the
chip. |
