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To: Jeff Fox who wrote (51673)3/31/1998 2:15:00 PM
From: Tony Viola  Read Replies (1) of 186894
 
Jeff, >>"The chip project "Mendicino" is doing
just this - adding 256KB L2 cache. This is 1/2 the cache size of the PII cartridges. This cache will
be integrated with the processor on a single die and will be presumably much cheaper overall
than the PII cartridge with discrete SRAM chips."<<

Are you sure that the L2 cache for Mendocino will be on the same die as the processor? The other alternative is to put it on the cartridge, as with current PII's. Then, how is it possible to make it so much cheaper than the real PII? You are probably right; the reason I wasn't sure is that a PII, and 256K of L2 sounds like too much for one die. Anyone else?

Thanks,

Tony
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