Someone may be interested in the CEO's views of the Ando deal.
LTX and Ando: the Power to Test the Future
Remarks to the Press Regarding LTX/Ando Alliance
By Roger Blethen, President and CEO
April 27, 1998
I'd like to thank you all for coming today and showing your support for what I believe represents a new era in semiconductor test. Specifically, I'd like to thank our customers for their belief in both LTX and Ando, and in Fusion as the premier test solution for systems-on-a-chip. I'd also like to thank the press for your interest in Fusion and the Ando/LTX alliance.
But I must offer special thanks to Dr. Nakanuma, who had the vision to bring our two companies together and forge this alliance, to Mr. Motohashi, whose commitment made this agreement a reality, and finally to Mr. Tanaka of Ando and Mr. Ken Daub of LTX, who have each spent the past year crafting the initial vision into an alliance.
Right now I'd like to take a few minutes to talk about the market opportunities I see for system-on-a-chip devices, the business opportunities of this alliance, and the technical highlights of Fusion, which I believe represent a new era in semiconductor test.
Over the course of the past few years we have seen great strides being made in system-on-a-chip devices, which integrate fundamentally different IC subsystems -- mixed signal, high-speed digital, and embedded memory components -- on a single piece of silicon.
Who, for example, could have imagined a year ago that it would be possible to put all the functions for a personal computer -- currently contained on several separate chips -- on a single chip? Yet National Semiconductor recently announced that their "PC-on-a-chip" is scheduled for release by mid-1999. And in the news late last week, eight IC manufacturers, including Hitachi, Matsushita, Sharp, Sony, and Toshiba, all announced plans to produce home network systems containing system-on-a-chip devices. And that's just two of the announcements; what once seemed impossible now seems inevitable.
Which is good news, since freefalling DRAM prices over the past two years are driving chip makers to focus on new business opportunities. The system-on-a-chip trend promises to produce substantial new revenues and profits for those companies with the capability to manufacture and test systems-on-a-chip. According to Dataquest, the system-on-a-chip market more than doubled in size in 1996 to $2.2 billion, and by 2000 will reach nearly $16 billion -- a growth rate of approximately 80 percent a year.
Let's take a closer look at how this will work in the testing world. According to Prime Research, a reasonable division of today's $4.2 billion test market would resemble what you see here -- an $710 million mixed signal test market, a $1.6 billion memory test market, and a $1.2 billion digital VLSI test market.
Now jump ahead a few years, and you'll see the growth rate I mentioned at work. The total test market should be in the $5 billion range, although it will divide along much more consolidated lines: about $2.2 billion in DRAM testing and $2.8 billion in system-on-a-chip test.
One could easily argue that systems-on-a-chip are the most exciting -- and lucrative -- thing to come out of microelectronics since the microprocessor, which, of course, is really an "all digital" system-on-a-chip.
These devices are the engines that will power the graphics, display, multimedia, and communications functions of the next generation of electronics products and information appliances. Even a short list of the end products is staggering: personal digital assistants with real-time audio and video, powerful graphics accelerators, advanced pagers, advanced digital cameras, digital video disk players, high-definition TVs, home satellite set-top boxes, mobile internet terminals, and active suspension and automotive collision-avoidance systems.
But I'm sure you're already aware of this. Japan has historically led the market in feature-rich consumer products. Japanese semiconductor companies can boast considerable depth of digital, memory, and analog technical expertise and are already producing a wide array of consumer products with embedded analog and mixed signal functionality.
And clearly, Japanese semiconductor companies have already positioned themselves to take advantage of this burgeoning market. They have invested billions of dollars in fabs and CAE technology (in fact, most have announced plans for 0.18 micron, 300 mm wafer fab facilities). They have embraced the concept of intellectual property blocks and were among the first to address the challenges of core-based design through channels like the VSIA.
Japan is perfectly positioned to produce -- and profit from -- the system-on-a-chip IC trend. That's one reason we're all here today. We all want to be among the companies that will rise to the top in this new market.
In test, I can assure you that LTX and Ando intend to be two of the front-runners in the system-on-a-chip market. A principle reason for my confidence is Fusion.
Fusion is the only test platform specifically designed to test the range of functionality on system-on-a-chip devices, and as such, Fusion is driving a sea change in semiconductor test. I know that other ate companies have proposed using multiple, serial test platforms for testing the memory, digital, and analog portions of system-on-a-chip devices, but we believe a segmented approach to test no longer makes sense. And with this alliance, Ando has endorsed Fusion's single platform as the system-on-a-chip test solution for the Japanese market.
Now I'd like to tell you a little more about the business opportunity for LTX and Ando as a result of this alliance.
This first-of-a-kind agreement will unite both companies' research and development efforts behind Fusion's single-platform test solution. That translates into a combined engineering work force of 600 engineers who bring an unparalleled amount of mixed signal, digital, and memory test expertise together to meet a common goal. This team is ready to meet test demand for the worldwide system-on-a-chip market.
Specifically, Ando will establish a new division -- one charged with developing Fusion applications and leading the marketing, sales, manufacturing, and customer support efforts for the Fusion product line in Japan.
Together, LTX and Ando will enhance Fusion's enVision++ operating system and co-develop a library of proven test methods, or Test IP. And LTX and Ando will each represent for the other a second manufacturing supply source for customers -- an installed base of customers with over $5 billion worth of LTX and Ando equipment at work on their manufacturing floors. This is a breakthrough agreement and a long-anticipated step toward standardization in the semiconductor test industry. Never before have two independent companies jointly developed and supported a common test platform and software operating system. Never before have two companies pursued a common technology road map.
I also see great synergy in our working together to bring Fusion to Japan, the world's major IC production market. LTX's strength in system-on-a-chip and mixed signal test is the perfect complement to Ando's memory and digital test and device handler expertise. Put the two companies together and you have the ideal test solution for the Japanese market -- a single, flexible manufacturing platform that can both enable the testing of system-on-a-chip devices and reduce the total cost of test capital.
This alliance is truly a situation where one plus one equals three, which brings to mind an english word: Fusion. Fusion means the merging of different elements into a union that is greater than the sum of its parts, and that's exactly what the Fusion test platform is. LTX was one of the first STE companies to recognize the market shift to systems-on-a-chip, and in 1996 we began a company-wide initiative to integrate our expertise and develop a technology roadmap focused on testing these new devices. Last year at ITC in Washington we launched Fusion, and the press and analyst community, as well as our customers, declared it a well-conceived product whose time had come.
What Fusion offers is a complete test umbrella that covers all testing requirements and applications. And thanks to Fusion's modular architecture, chip makers can buy exactly the test capability they need because Fusion offers test configurations for ICs ranging from VLSI digital to systems-on-a-chip.
Let me give you a few examples of Fusion's industry-leading test capabilities:
Fusion can be configured with up to 1024 digital pins that provide up to 500MHz non-muxed channel speeds.
Fusion can be configured with LTX's high speed data channel capability, which can test Fibre Channel, Firewire, and Panel Link serial data ICs at speeds of up to 2200 megabits per second.
LTX's unique dual pattern memory architecture can generate complex digital patterns, and the data pattern memory can be configured with up to 32 megavectors.
Fusion's ActionBus option flawlessly synchronizes events between all instruments for precision control of each test.
FlexWave, Fusion's innovative timing system, can create and store up to 64 unique waveforms in each pin's waveform memory. Not to mention that each 250MHz waveform can support up to four events per pin.
Fusion's memory test option allows test engineers to create complex algorithmic memory test patterns at rates up to 250MHz. Fusion's unique 16 bit per-pin-APG design tests multiple embedded memory arrays in parallel. The new HF test head is remarkably small and mobile considering its rich mix of features, and can simultaneously test a wide range of mixed signal functions such as RF, smart power, precision high voltage analog channels, precise timebase analyzers, powerful DSP-based synthesizers and digitizers, and much more.
Fusion's HiPer II is the next generation of ultra-high performance pin electronics technology. It provides higher-bandwidth source and measure and new 50mV minimum swings.
HiPer II's innovative differential drive and compare capability was designed as two complete pin electronic channels in a single monolithic circuit. The channels can be used as independent I/O channels or as a differential driver/comparator pair.
PowerPulse allows IC manufacturers to deliver up to 160 amps to the DUT at a full power bandwidth in excess of 1 MHz. Up to 32 continuous power source channels offer the same high load transient bandwidth and current capability for high power VLSI devices, but at lower voltages.
If you're interested in more technical details -- and I suspect that you will be -- we have Fusion brochures and a technical overview for you to review after this event. But just considering the capabilities I've touched on, I think you will begin to see my point about Fusion being not just another new tester, but a new kind of tester.
The fact is that, until Fusion, semiconductor manufacturers were forced to buy multiple discrete machines to accommodate their device mix. This usually resulted in a fragmented test floor where some testers were always idle, no matter what devices were being produced in a given week. In other words, the only choice was an artificially segmented and inflexible test environment that led to overcapacity and higher fixed costs in manufacturing test.
Fusion signals an end to those days. Fusion's flexible design means that it can be configured to address the complete non-memory output of a semiconductor fab. In other words, Fusion behaves more like its front-end cousins, such as etchers and photolithographers, and can reduce the overcapacity typically found on a test floor by 20 to 40 percent.
The key to this savings is making the test cell more productive and maximizing the output from every inch of the test floor. That's why we like to say that Fusion fits the factory.
The other key to cost savings is making your engineers more productive, and a common operating system is vital to that end. With a single development environment, you get a more flexible engineering work force. And with the shortage of good test engineers likely only to become more acute, it is imperative that they be able to support the test requirements of any device in a manufacturer's portfolio.
enVision++, Fusion's operating system, could be the last test programming environment any test engineer will have to learn. enVision++ combines reusable, object-oriented digital programming and a clear graphical user interface with the power of LTX's highly flexible mixed signal language. enVision++ will also allow test engineers to capture and reuse Test IP, just as design engineers currently use pre-packaged segments of code to take time out of the IC design process.
Equally important, enVision++ provides transparent, multi-site test capability, so that a test solution can be scaled to boost the productivity of a limited amount of floor space. Again, the front-end manufacturing process has long relied on a scaleable approach; Fusion simply extends this paradigm to test.
And finally, Fusion offers the breakthrough Virtual Test Suite, which allows IC manufacturers to achieve off-line simulation of the tester and device environment, so test development can begin before first silicon.
This is precisely the flexibility manufacturers need to test systems-on-a-chip and the embedded computers of the future, and this is precisely what LTX and Ando can offer to the Japanese market with Fusion. Add to that the engineering power of two leading companies focused on creating new hardware and software options, the ability to uniquely support our customers in Japan, and the technology to develop Test IP, and now you have an alliance -- or a Fusion -- that I am proud to be a part of.
Thank you. |
