John,
Thanks for Tom's link. If the roadmap is accurate, I think AMD will be in a good position for the next 5-6 months. The Celeron300 release in June is a nonissue, if it has no cache and runs on a 66MHz. From the graph, it also looks like the Mendocino based Celeron (Sept 98) will be on a 66MHz bus. Does anyone know if this is accurate? Second question is, 'Why?'. During the lull from now till Mendocino Celeron, I hope AMD will use this time to separate the K6 from any Celeron linkage (unlike the boner w/ the PMMX).
AMD seriously needs to release a 350MHz K6-3D on May 28. That will leave AMD 1 speed bin behind Intel for for 2 months, maybe enough to affect 2nd quarter results ($210 price differential from PII300 to PII350). Also, from 350MHz upward, the K6 will not be influenced by Celeron pricing. I think AMD needs to be no more than 1 speed bin behind Intel, since I don't think the PII can compete with the K6, except at the highest speed bin, and allow Intel to make a 50% gross margin. Therefore, if AMD can stay in the speed race, I think AMD's gross margins will rise nicely.
I was astounded by the quoted price differential of PII Xeon w/ 2MB cache (400MHz-$2700, 450MHz-$4500). Looks like server manufacturers will be well rewarded by making multi-CPU (400MHz-2MB or 450MHz-512KB) boxes and clusters as well as moving to less CPU intensive I/O architectures. |
