RE:"It is a split transaction processor bus AND it separates the L2 cache bus from the system bus"
Paul,
On the personal side:
You are sounding a lttle frustrated. Perhaps it is the lost INTC net worth due to MediaGX. You may want to find a way to deal with this because it is probably going to get much worse over the next 12 months.
On the technical side:
Since Intel, AMD and IDT are all moving to integrated L2 architectures, a separate L2 bus seems like a pointless and expensive "feature." How many pins are wasted on the L2 bus? I'm surprised you would brag about this.
Why would I want to have a split transaction bus in a single processor system? One of the many, many defects of the x86 architecture is a lack of registers. Operands are kept in memory and the CPU core stalls immediately upon a load miss. Having a second non-stalled instruction does little for performance. In addition, the presence of an onboard L2 makes the memory bus behavior mostly irrelevant (again, in a single processor system.)
Repeating the point I tried to make earlier, there is no empirical evidence that slot 1 processors are as fast as socket 7 processors.
BTW: At one point I thought Merced was going to be a threat to Intel's competitors during this millenium. Is Merced turning into a huge boondoggle, or am I imagining things?
RE:"Perhaps that isn't apparent to you, but then again, you are welded into your Cyrix investment and need to constantly blame somebody other than Cyrix for Cyrix's miserable performance."
Actually I recently abandoned my long held investment in Cyrix. Until they start shipping a processor with top notch floating point, integrated L2, and competitive megahertz I don't see the stock moving. However, I do see the MediaGX as a great facilitator for my INTC puts.
Scumbria |
