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Technology Stocks : CYRIX / NSM

NSM 18.27

0.0%

Jul 31 5:00 PM EST

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To: Scumbria who wrote (27549)	6/19/1998 5:05:00 PM
From: milan0	Read Replies (1) of 33344

Scumbria You had a discussion with Steve Porter arguing that the MXi, due to memory latency, will be slower than with an L2 cache. My favorite issue to beat to death is the fact that CPU performance is limited by memory latency, rather than bandwidth. A 128 bit bus does nothing for latency. However, Cyrix says the contrary. First, here is Swearingen in this recent article: techweb.com The original Cyrix press release said same: cyrix.com The processor also integrates the latest system technology, including SDRAM control, AGP and consumer-quality DVD playback, onto the processor. With its low memory latency and industry-leading memory bandwidth - greater than 2GBytes per second - the MXi is expected to significantly outperform competing non-integrated AGP solutions. Cyrix also has a pdf file explaining the MXi. Since I am not a technical type, I can't say if these memory features could obviate the natural latency of RAM. ftp://ftp.cyrix.com/developr/mpf97db.pdf Multi-ported memory control interface with 13 cache lines of write post queuing and tractable prioritized arbitration 256 entry 4-way set associative GLB 128-bit SDRAM interface Greater than 2GB/sec memory bandwidth Supports double-edge data rates Up to 16 open banks and up to 32KB pages Supports up to 8 pipelined requests Scumbria (or anyone knowledgeable), do these features balance memory latency in any way? Could the MXi be as fast as with an L2 cache with these memory features? Mike

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