Francis, maybe you can find it on the Net, I couldn't, but I read a short story in my San Jose Mercury News paper this morning that said Intel had "fixed" the Xeon chip > 2 CPU's flaw, and was testing the fix. Article went on to say that 4 way multiprocessor server shipments would be delayed 3 to 4 weeks (good news if they keep it that short). They reiterated, (we'd heard before) that the flaw is fixable in microcode, or software as the article put it.
I still don't know if Intel has to re-run silicon, or is the microcode memory writable? I'm guessing Silicon re-run.
As for the Mercury saying the flaw is fixed , I don't personally consider a bug or flaw or erratum fixed until it has been thoroughly tested, including all possible regression testing, Still, overall, looks like good news on this one (if you like Intel).
Tony |
