Larry Boy, << 100 chips between alyd, vias, and ptus >>
Ptus I haven't researched, but will. Currently I'm 2 to 1 with
Alyd in the lead. Still have some Alyd cream left for Y2k investing.
Things like Smartcode, and all the other terms being throw
around bother me. I know there's going to be a lot of line by line
sorting in the end. Although not a software engineer, I did spend
some time writing software on cad systems. Design to process verification rules, and layout to schematic rules, along with
parasitic capacitance, resistances and other unwanted components
derived as a result of putting the schematics on working architecture.
My point. I would challenge any software extrapolation program
to unfold and interpret MY code. Especially the parasitics that
are compiled from 13+ interconnecting layers containing every electrical characteristic in existence. sort of a 2^13 scenario. Ha! Good luck.
I vision a software correction shot to sort out 90% of the problems, but it's that last 10% that takes 90% of the time. Presently I'm biased towards ALYD, but as I spend some time evaluating various solutions, this could change. It's that 10% I talk
about that will ultimately win. Manpower will be decisive, IMHO of
course. That's my present stand, but who knows; tomorrow I'll be
delt another hand and see if I want to hold my cards or make a draw. :-) Larry |
