SST Announces SuperFlash Technology Road Map to 0.15 Micron Geometries For Embedded Applications
PR Newswire - July 15, 1998 14:33
World-Class Foundries Line Up Behind Company's Technology
SUNNYVALE, Calif., July 15 /PRNewswire/ -- SST (Silicon Storage Technology, Inc.) (Nasdaq: SSTI) today revealed its SuperFlash(R) technology road map for embedding flash memory in emerging System-On-a-Chip applications. The company also announced that during the last 18 months, it has licensed its SuperFlash technology to world-class wafer foundry suppliers including IBM, Samsung, Sanyo, Seiko Epson, and TSMC. Depending on the business model of each source, system designers may purchase application-specific standard products (ASSP), custom designs, ASIC design or the direct use of SuperFlash IP blocks supplied by these foundry sources.
SST's road map covers 0.33 micron, 0.26 micron, 0.18 micron and 0.15 micron geometries for the next five years. These technologies are expected to be readily available from at least one foundry source in the years 1999, 2000, 2001 and 2002 respectively. Currently, the 0.5 micron SuperFlash embedded technology is available from TSMC. SST has been working with several foundries to bring up the 0.45 micron, 0.33 micron and 0.26 micron technologies. The company has recently started a 0.18 micron project propelling it onto an advanced technology road map and providing a distinct competitive advantage.
SST is committed to support the industry's growing trend of integrating more system functions on a monolithic silicon chip. By making its superior flash memory technology widely available through multiple licensing arrangements, system designers can be assured a continuous supply of a mainstream technology with a competitive road map. "Technology licensing has been a major part of SST's business strategy. Our objective is to make SuperFlash the technology-of-choice for embedded applications," said Bing Yeh, president and chief executive officer of SST.
"In the past, integrating the non-volatile memory function with the logic circuit was a monumental task," said Sohrab Kianian, SST's director of Technology Licensing and Business Development. "We firmly believe that the introduction of SuperFlash by SST solved this long-time industry problem."
About SuperFlash Technology
SST's SuperFlash technology overcomes the limitations of traditional flash technology through a proprietary process and cell architecture. The SuperFlash technology and memory cell offer a number of important advantages for designing and manufacturing flash EEPROMs, or embedding SuperFlash memory in logic devices when compared with the thin oxide stacked gate or two transistor EEPROM approaches.
The SST split-gate memory cell is comparable in size to the single transistor stacked gate cell (for a given level of technology), yet provides the performance and functionality benefits of the traditional two transistor byte alterable EEPROM cell. A reliable thicker tunnel oxide enables further scaling to higher densities.
Advantages of SuperFlash
There are several major technological advantages of SuperFlash that make it the best choice for embedding with logic circuits:
Lower cost -- A simple CMOS compatible process, simple peripheral circuit resulting in high memory efficiency, and faster test time due to an efficient program and erase feature.
Superior reliability -- A relatively much thicker tunnel-oxide, and relatively low field operations results in superior data retention reliability even after repetitive program-erase cycling of the memory cell.
Low power, low voltage operation -- SuperFlash's split-gate NOR cell uses source-side hot electron injection, which is a thousand times more efficient than the drain-side hot electron injection used in the stack-gate flash cell. Freedom from erase or program verification circuits also conserves power and provides for the best technology for battery-powered wireless applications.
Ease of integration -- Logic circuit design and integration is easier due to compatibility with a standard CMOS logic process. Also, a more simple and efficient memory peripheral design and interface enables rapid circuit design, hardware development, debug, characterization and yield improvement.
High density -- The embedded flash memory cell size is projected to be approximately two square-micron, one square-micron and 0.5 square-micron at 0.35 micron, 0.25 micron and 0.18 micron geometry respectively. This small cell size makes it possible to integrate high-density nonvolatile memory arrays in a system chip.
Wide selection of functionality -- The small erase-block feature for data storage or big blocks for code storage, offers selection flexibility without sacrificing performance factors. These features can all be designed on the same chip based on the same manufacturing process.
Fast erase time -- Erase time is by orders of magnitude faster than other technologies.
About Silicon Storage Technology, Inc.
Headquartered in Sunnyvale, California, SST designs, manufactures and markets low-cost, high-quality flash memory components for the computer, communications and consumer markets. Current product families include single-power supply (5.0V-only, 3.0V-only or 2.7V-only), small erase-block flash memory components, as well as two-power supply MTP (Many-Time Programmable) flash products. SST is also developing products for the mass storage and flash embedded controller markets.
All SST memory components products are based on patented, proprietary SuperFlash technology. SST offers this technology for embedded applications through its world-class manufacturing partners and technology licensees IBM, Samsung Electronics Co. Ltd., Sanyo Electric Co. Ltd., Seiko Epson Corp., and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC).
Further information on SST can be found on the company's website at ssti.com
Forward-Looking Statements
Except for the historical information contained herein, this news release contains forward-looking statements that involve risks and uncertainties. These risks may include timely development, acceptance and pricing of new products and technologies, the terms and conditions associated with licensing agreements, the impact of competitive products, technologies and pricing, and general economic conditions as they affect the company's customers, as well as other risks detailed from time to time in the company's SEC reports, including the report on Form 10-K for the year ended Dec. 31, 1997.
NOTE: The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MTP is a trademark of Silicon Storage Technology, Inc.
SOURCE Silicon Storage Technology, Inc.
/CONTACT: Sohrab F. Kianian of Silicon Storage Technology, 408-523-7748,
skianian@ssti.com; or Nancy Sheffield of Tsantes & Associates, 408-369-1500
ext. 38, or nsheffield@tsantes.com, for Silicon Storage Technology, Inc./
/Web site: ssti.com |
