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Politics : Formerly About Advanced Micro Devices
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To: Maxwell who wrote (35130)7/26/1998 11:40:00 PM
From: Paul Engel  Read Replies (1) of 1572637
 
Maxwell - Re: Yousef & "Yet I understand and know more than you. Your posts have demonstrated a lack of understand in the technology. "

Yousef knows an incredible amount regarding wafer processing.

Although you seem knowledgeable, you make blanket, naive statements such as:

{======================}
"Copper conductivity is about 50% better than Al.
...Ohm Law:...Power=R*I*I
...Lower power means lower power dissipation
...Power=C*f*V^2 for a CPU. Lower power means you can go to higher
frequency without burning the CPU and can be put in notebooks.
...Lower resistance means you can scale the die size down further since
the metal trace resistance is now 50% less."

{=======================}

This totally ignores the implementation problems with copper - especially in a damascene type of process. The BARRIER FILMS required to encapsulate the copper - to prevent diffusion into the oxides and bulk silicon - CONSUME SIGNIFICANT AMOUNTS OF SPACE/VOLUME that should go to copper. The net result is to REDUCE the cross section of copper interconnects - since the barrier materials take up the rest - which NEGATES THE resistivity improvements.

Remember :R = (rho*l)/A, where A is the cross sectional area of conductor of length l and resistivity, rho. The resultant smaller A - with barrier films surrounding the copper [with a fixed trench size dictated by the metal pitch], counters the effect of the reduced rho for damascene copper with barrier films.

Also Re: "..Fluorinated HDP (K~2.5-3) is cakewalk with Cu damascene.
...AMD will have both Low R and Low K"

If this is such a "cakewalk" for AMD - why hasn't AMD implemented it - and why did they have to go to Motorola for the copper process?

Face it - AMD has no cakewalk at all in wafer processing.

Paul
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