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Politics : Formerly About Advanced Micro Devices
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To: Elmer who wrote (35502)8/4/1998 10:06:00 PM
From: Scumbria  Read Replies (1) of 1573570
 
It wouldn't surprise me if you're right. On what do you base this 10% estimate?

Back of the envelope calculation:

L1 hit = 1 core clock
onboard L2 hit = 3 core clocks
off chip L2 hit = 10 core clocks
Dram page hit = 20 core clocks
Dram page miss = 100 core clocks

L1 hit rate = .98
L2 hit rate = .90
Dram page hit rate = .5

onboard L2 latency = 1*.98 + 3*.019 + 20*.005 + 100*.005 = 1.637
off chip L2 latency = 1*.98 + 10*.019 + 20*.005 + 100*.005 = 1.77

The average memory latency decreases by less than 10% with an onboard L2.

Scumbria

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