SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 87.63-3.9%3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: mozek who wrote (6064)8/10/1998 7:32:00 AM
From: Shibumi  Read Replies (1) of 93625
 
Mike:

In the article, they state that these sets aren't capable of receiving HDTV signals and that you have to wait on the decoders. This followed another article I read in print last week about most HDTV manufacturers separating out the monitor from the "tuner" on these types of sets.

Are you sure that these sets have Rambus-based technology inside -- or is it only the decoders? Because of your post (thank you!), I went searching -- the most relevent article I could find (see below) implies a strong link to any Panasonic converters -- but I couldn't see from this where they'd be used in the monitor. Any help you could give here would be greatly appreciated!

Thanks
-------------------------
Panasonic Develops First Single-Chip Digital Television Video Decoder
BURLINGTON, N.J.--(BUSINESS WIRE) via Individual Inc. -- Panasonic AVC American
Laboratories, Inc. (PAVCAL) announced today that it has completed development of
the world's first single-chip device that will be able to decode digital television video
signals and format them for display when America's new, all-digital broadcasting service
begins in the fall of 1998.
This low-cost single-chip solution was designed for digital and high definition
television (HDTV) receivers, digital set-top boxes that will be used with today's analog
TV sets, and computers and other digital products which are being developed now. It is
one of the key components in the Digital Television Decoder to be exhibited at
Panasonic's booth (N-220) at the Winter Consumer Electronics Show in Las Vegas,
January 8-11, 1998.
The major television networks and scores of local broadcast stations are already
building new digital facilities, and over-the-air digital TV programs are projected to reach
approximately 30% of American households by November 1998, and over 50% by fall
1999. "This is the first single-chip device that can decode and display all of the digital
TV signals that can be broadcast, using the new digital standard, in any of the different
HDTV or standard definition formats," said Sai Naimpally, PAVCAL Vice President and
leader of its DTV development team. "It processes the digital signals in two ways, both
decoding them for display in their original format, and converting them for use in today's
televisions."
The new DTV Broadcast Standard gives TV stations the option of using and switching
between any of eighteen different television formats, each suited to different purposes.
These formats combine different screen ratios (16:9 'wide-screen' or 4:3, like today's
TVs), numbers of horizontal and vertical lines of resolution, and scanning methods
(either 'interlaced' scanning, like today's TV displays, or 'progressive' scanning, like
computer monitors).
The chip--technically termed a "Digital Television MPEG2 Main Profile at High Level
Video Decoder" -- functions in both a 'full- spec' mode and a 'down-conversion' mode. In
the full-spec mode, it decodes the compressed video signal from the broadcast and
outputs the original format, that is, either HDTV (1080-lines interlaced or 720-lines
progressive) or SDTV (480-lines interlaced or 480-lines progressive). Single chip
operation is made possible by use of 500 MHz concurrent 16 Mbit Rambus(TM)
DRAM's.
The 'down-conversion' mode converts all compressed video signals to 480-interlaced
and 480-progressive formats. This is accomplished by a memory-efficient MPEG
down-conversion algorithm developed by PAVCAL.
The operation of the decoder chip conforms to both the DTV Broadcast Standard
adopted by the Federal Communications Commission and the more-detailed ATSC DTV
Standard, drafted by the all-industry Advanced Television Systems Committee (ATSC).
The Panasonic single-chip digital television video decoder is fabricated in a 0.35 micron
process in a 240-pin device package.
Panasonic AVC American Laboratories, Inc. is the main North American digital
television research facility of Matsushita Electric Industrial Co., Ltd. Under Jukka
Hamalainen, its president, and Mr. Naimpally, the laboratories have conducted research
on advanced television and digital television since 1980.
Matsushita Electric Corporation of America (MECA), with headquarters in Secaucus,
NJ, was established in 1959 and is the principal North American subsidiary of
Matsushita Electric Industrial Co., Ltd. (MEI), of Osaka, Japan. Along with its
subsidiaries and affiliates, MECA -- which markets products under the Panasonic,
Technics and Quasar brands -- recorded sales of $7.4 billion in the fiscal year ended
March 1997. Matsushita has 26 North American manufacturing sites in the United
States, Canada, Mexico and Puerto Rico, and employs 21,000 people here.
CONTACT: Panasonic | Kurt Praschak Setsu Mizoguchi | 201/392-6124 201/271-3297
[Copyright 1997, Business Wire]
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext