New EUV light source? If true, this may not be good for CYMI. Realistically, we need to know about power output, stability, etc. It is a long road to qualification....
pubs.cmpnet.com
A service of Semiconductor Business News, CMP Media Inc.
Story posted at 7:30 a.m. EDT/4:30 a.m. PDT, 8/17/98
New EUV light source may cut cost
of future litho systems, says physicist
ORLANDO, Fla. -- A physicist with the University of Central Florida here
said he has invented a powerful new light source for extreme ultraviolet
(EUV) photolithography systems, which are expected to be used in the next
decade to produce integrated circuits.
"The actual discharge device is as small as my thumb and, together with the
necessary electronics, can be packaged into the size of a small filing cabinet,"
said William Silfvast, inventor of the EUV light source. "It can be activated
almost as simply as flipping on a light switch," added the UCF professor.
The system, when fully developed, will require less electrical power than
laser-based imaging systems need, according to Silfvast, whose work is
being funded by the Semiconductor Research Corp. (SRC) consortium.
Several EUV systems are now being explored by an industry consortium,
called the Extreme Ultraviolet Limited Liability Corp. (EUVLLC), which is
led by Intel Corp., Motorola Inc. and Advanced Micro Devices Inc. (see
Sept. 11, 1997, story).
A development team, headed by Silfvast, is now working with Sandia
National Laboratories to evaluate performance requirements for EUV
lithography tools and to develop an engineering prototype using the new light
source.
The EUV light is produced within a capillary tube with an opening about the
size of the point on a ballpoint pen. The tube consists of electrically insulated
materials with metal electrodes attached at each end. An intense electrical
current is generated for short period of time in a low-pressure gas or vapor
when voltage is applied across the electrodes. The EUV light is emitted from
the ends of the tube, where it can be collected and use to expose device
patterns on wafers. |
