Ali,
Re: "Let me, as a "screwdriver", tell you something ... old-fashion CMOS logical
devices worked at any voltage from 3V to 15V."
Screwydriver, you are "way" outside your area of any knowledge. The fact
is that if you lower the operating voltage WITHOUT redesigning the FET, then
the gate overdrive voltage (Vgate-Vthreshold) will be reduced and the
drive current (Idsat) will be significantly reduced. I can guarantee
you that if you just drop the operating voltage, the K7 will NOT operate
at 600mhz or even 400mhz ... Look, AMD is having a hard time even getting
the K6-2 to run at 400mhz even at the higher voltage. A redesign of the
FET would include thinner gate oxide, shorter gate length, different S/D
extension doping profile, channel doping changes, and possible HALO S/D
implants.
Re: "Please share with us your deep vision of current technology."
Hopefully, you will listen this time, Ali without your verbal "diarrhea". <ggg>
Otherwise, please go back and play with your TTL logic.
Hope this helps.
Make It So,
Yousef |
