Tony, <WRT non-toy (AMD type) computers is a standard in the industry
and a serious spec. parameter>
I am far from objecting that servers have more
requirements for design than desktops.
However, from your original post
Message 5842575
it is crystal clear that you need to request some
additional training on the subject. Your list is
an eclectic mixture of requirements for HW system
designers, SW support, mechanical engineering,
with very few items that are directly related to
the CPU design itself. 80% of your items are largely
independent of the CPU features (including "big L2
caches", hot-swappability, all your "security",
etc, etc). Even ECC can be of more importance in
DRAM/L2 link rather that at CPU/L1 side. Even SMP
can be implemented in PC-board core logic if
badly wanted.
As for reliability and debug, for your information,
tools like TAP (Test Access Port, formerly JTAG
and now as IEEE 1149.1-1990 spec), HDT (Hardware
Debug Tool), Functional-Redundancy Checking, not
mentioning BIST, were there from the day one even
on K5 - go check current specs on K6 or dig some
old book on K5.
I guess this is enough to prove that your endorsement
of AMD processors as "toy-types" is a result of
serious flaw in your information and/or training.
<Sounds like you don't want to know.>
No surprise, this turns back to you perfectly:) |
