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Politics : Formerly About Advanced Micro Devices

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To: Maxwell who wrote (39194)	10/13/1998 3:18:00 PM
From: Steve Porter	Read Replies (1) of 1573835

Maxwell, How could you get around using a 2 cycle latency for an L1 of that size. We will be lucky if it is only IMHO. Wouldn't a layered scheme like I suggested in my previous post to you make much more sense as a long term design goal? Steve

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