Ann - Re:"MMX. Does anyone have any info on what the problems were???"
The MMX, as implemented in the Pentium, uses the floating point pipeline for implementing MMX instructions. As such, MMX instructions can be executed only when the state of the CPU is switched ( a state switch) from FPU mode to MMX mode.
The implementation on the Pentium MMX was/is done in such a way that a severe penalty is incurred when switching states from one mode to the other. I believe 56 clock cycles are required, in which nothing gets processed, while the CPU does its internal housekeeping.
Thus, any software that needs to do BOTH MMX and FPU instructions in a sequential (or near sequential) mode will incur an enormous speed penalty doing the transitioning from one state to the next. Clearly, minimizing state switches will minimize the penalties but some 3D rendering software might not perform optimally under these restrictions.
The Pentium Pro MMX implementation (i.e., Klamath) requires only about 5 or 6 clock cycles to make the state switch. Clearly, this state switch will incur only minor delays.
One other potential problem is context (task) switches from one application to another. If a task is running in MMX mode and is interrrupted by a new task, and the new task ASSUMES the CPU is in FPU mode, then rather interesting results may occur - all of which will not be pleasant. So, task/application switching must be carefully controlled by the software applications that are being multitasked.
Yet another problem for the MMX is diminished expectations. Many months ago, Intel was touting speed increases on certain types of software using MMX instructions from 50% to 300% or more. This inflated everyone's opinion and expectations of MMX technology.
Currently, Intel, I believe, is using much more "conservative" estimates for MMX enabled applications - 30% to 60% speed improvement vs non-MMX versions of the same software.
Bear in mind, the L1 Cache of the Pentium MMX has been increased from 16 KiloBytes in the original Pentium to 32 KiloBytes in the Pentium MMX, so speed improvements will also come from this enhancement (even for non-MMX applications).
Paul |
