SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Tenchusatsu who wrote (39631)10/20/1998 2:05:00 AM
From: Brian Hutcheson  Read Replies (1) of 1578871
 
Tsen , re. PII inferiority
The FPU of the PII as everyone in the PC press acknowledges is better than the K6 but the integer unit is slower , one reason is that K6 is a 6 issue execution unit as opposed to PII's 5 issue . The K6 also was designed with L1 cache twice the size of PII those 2 factors make the K6 core superior . Laying bets that a k6 without L2 cache on Mboard is slower than a Celeron is pointless since it is unlikely that you bother proving it .
The Celeron 266mhz was slower than a K6-200 that is sufficient proof that most of the "high performance" of the PII comes from the L2 cache on the daughter board since that is the only real diffference ,
Brian
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext