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Politics : Formerly About Advanced Micro Devices
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To: Jim McMannis who wrote (39989)10/24/1998 11:12:00 PM
From: Tenchusatsu  Read Replies (1) of 1573921
 
<Don't you agree that by offering a K6-2+s that it would save AMD from having to throw K6-3s with bad L2 caches in the trash bin?>

I don't see why AMD should be getting plenty of K6-3's with bad L2 caches. AMD is most likely pulling the same trick Intel did with Mendocino and adding a few redundant columns in the on-die L2 cache. If a defect or two pops up in the L2 cache, just disable those columns and use the rest. The simple layout makes this possible and viable.

Tenchusatsu
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