Formerly About Advanced Micro Devices Message Board

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Politics : Formerly About Advanced Micro Devices

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To: Scumbria who wrote (40510)	10/31/1998 2:11:00 PM
From: RDM	Read Replies (3) of 1573727

Excuse me for being incomplete. When I said cache fill rate I meant the "L1 cache" fill rate. This the transfer between the "L2 cache" and the "L1 cache" which occurs through the bus in the K6-2 and within the chip in the K6-3.

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