Nancy,
Seems like Transmeta is a LOOONG way off. Also, could be that they need to utilize RDRAM. The techies need to weigh in on this one...
MileHigh
Patent hints at Transmeta's plans
By Ron Wilson
EE Times
(11/13/98, 2:09 p.m. EDT)
SAN JOSE, Calif. — A patent granted to Transmeta Corp. may give an early glimpse into the highly secretive startup's architecture and business plan. The 1996 patent, which covers techniques for recovering from exceptions while one processor is executing code translated from another processor's instruction set, describes a preferred embodiment that may in fact be the Transmeta chip.
The architecture is a simple VLIW implementation with multiple integer, floating-point and load/store units. Added hardware features tune the architecture to work with an on-the-fly code translator patterned after X86-code-conversion software from the former Digital Equipment Corp.
The design includes large numbers of integer and floating-point registers — 64 and 32, respectively — to increase flexibility in renaming and in mapping target machine registers. In addition, the patent describes a 2-Mbyte translation cache to hold translated code that may be executed more than once.
Transmeta envisions a software translator that both converts X86 (or other) code to the native primitive operations and then schedules and packs those operations into VLIW instructions, leaving the results in the translation cache. The patent describes a device with one-quarter the transistor count of a Pentium Pro that could run X86 code faster than any then-extant X86 chip.
Transmeta was founded by David Ditzel, a key architect behind Sun's Sparc processor, and has been variably rumored to be working on a Java chip, an X86 clone and a media processor
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