Silicon Graphics Next-Gen Scalable Servers Based on Mainstream Memory Architecture
Company Selects Open-Standard Double Data Rate Synchronous DRAM as Scalable Server Memory
MOUNTAIN VIEW, Calif., Nov. 30 /PRNewswire/ -- Silicon Graphics, Inc. (NYSE: SGI - news) today announced its intention to employ double data rate synchronous dynamic random access memory (DDR SDRAM) in future scalable server computer systems. The move to adopt this new, open-standard semiconductor memory is representative of the company increasing its use of industry-standard components to make ccNUMA technology and supercomputing pervasive.
DDR SDRAM, whose unified specification assures compatibility among DRAM vendors, was recently ratified by the Joint Electronic Device Engineering Council (JEDEC).
''Silicon Graphics' systems demand the highest possible memory performance. Therefore, we evaluate several critical factors for our next-generation memory,'' said Richard ''Rick'' Bahr, vice president, Engineering, Server and Supercomputing Business Unit, Silicon Graphics. ''After thorough consideration we believe DDR offers better bandwidth per module and lower latency than D-RDRAM. Moreover, DDR offers lower intrinsic costs both in the DRAM itself and in the ease of integration with our current server architecture.''
Silicon Graphics' evaluation concluded that using DDR memory in next-generation systems offers almost double the performance of single data rate (SDR) DRAM. DDR also necessitates minimal system logic changes facilitating fast design-in. Since this new type of memory requires only minor changes in manufacturing techniques, it can be made at a relatively small cost premium over existing, slower memory types. This minor cost premium has historically been the trigger for adoption of next-generation DRAM technology.
In the past, Silicon Graphics has been one of the first to adopt new memory technologies such as Rambus and SDRAM. The company anticipates having more designs to use those technologies. However, DDR is the clear choice for its future scalable server main memory.
SOURCE: Silicon Graphics, Inc.
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