IBM drives DDR DRAM effort
By David Lammers
EE Times
(12/02/98, 3:29 p.m. EDT)
SANTA, Calif. — IBM Microelectronics said it will put its muscle behind DDR II, the next version of the double data rate (DDR) synchronous DRAM, a collaborative effort to develop a memory architecture that will deliver 3.2-gigabyte/second throughput for servers and 9.6-Gbyte/s throughput for point-to-point connections in small systems. IBM has already started sampling a 256-Mbit double data rate (DDR) synchronous DRAM that will go into volume production in mid-1999 at its fabrication facility in Essonnes, France. DDR II is scheduled to be ready for introduction in 2001.
IBM was among 11 DRAM vendors and large computer manufacturers to voice their collective support for the DDR specification this week, which put the DDR SDRAM back in the race for memory slots alongside the Direct Rambus DRAM (D-RDRAM). After a series of delays, the specifications for the DDR components and 200-pin DDR modules were agreed on this autumn. Only minor issues remain to be resolved for dual-in-line memory modules with DDR SDRAMs.
In an important development, companies participating in the Joint Electronic Device Engineering Council (Jedec) committee are buckling down to the task of getting DDR II ready for introduction by 2001. DDR I devices in 64-Mbit densities, which are coming on the market now, and in 256-Mbit densities, which will arrive late next year, operate at 133 MHz at 2.5-V operation. By reading data from the rising and falling edges of the clock, a maximum performance of 266 Mbits/s per pin can be achieved, IBM reported. By improving the electrical interface and moving the frequency to the 266-MHz range, a throughput of 400 Mbits/s per pin is feasible with DDR II.
Steve Przybylski, principal analyst at the Verdande Group, said the work on DDR II "gives the DDR initiative much more credibility, ensuring the server and networking people that this is not just a temporary and partial solution to their memory needs.
"If you really push the DDR technology," Przybylski said, "you can reach the same 1.6-Gbyte/s peak bandwidth performance, but normally DDR won't be as fast as the Direct Rambus parts on bandwidth."
While microprocessor vendors such as Intel, Advanced Micro Devices and Cyrix have endorsed the Rambus architecture for personal computers, and Compaq Computer's server division has voiced support for D-RDRAMs, Rambus has yet to convince most server manufacturers that the narrow, 16-bit Rambus channel can be effectively scaled to the multi-gigabyte main memories used in larger servers, analysts said.
Fujitsu Ltd., Hitachi Ltd., and Mitsubishi Electric Corp. unveiled 64-Mbit DDR DRAMs in October. NEC Corp. said it was ready to begin sampling a 128-Mbit SDRAM with a CAS latency of 2.5 ns. NEC built the device in a 0.22-micron process.
Bob Merritt, a research analyst at Semico Research (Phoenix), said the support of 11 DRAM and system makers for DDR "is a very significant announcement because of what it says, as well as what is not being said. It says that system and PC designers are now assured that one branch of the DRAM family will follow the traditional path of previous high volume DRAMs. The Jedec vote back at the 64-k DRAM generation established that DRAM manufacturers would focus on lowering component costs by maintaining design simplicity and evolutionary architectural changes. This announcement confirms that adequate support will continue for those kinds of memory products.
Lane Mason, a strategist at IBM's memory division, said "because servers use tremendous amounts of memory, any little incremental cost is magnified. Also, the server people are attracted to DDR because of the relative lack of risk in the technology. It leverages the same kind of connectors and modules and packaging that they are used to, so DDR minimizes the technical risk for designs coming to market in 2001 and 2002."
IBM will make a limited number of 64-Mbit DDR SDRAMs, and only for development projects, Mason said. The company's real thrust will take place with the 0.2-micron 256-Mbit chip that will operate at 133 MHz. IBM sent samples of that part to one large OEM external to the company in November. In the future, IBM will apply a 0.175-micron process, and Mason said a 512-Mbit DDR SDRAM "is on our road map." A 128-Mbit DDR SDRAM will emerge in late 1999.
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