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Technology Stocks : The New QLogic (ANCR)

QLGC 16.07

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Aug 24 5:00 PM EST

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To: Craig Stevenson who wrote (19634)	12/4/1998 9:21:00 PM
From: Greg Hull	Read Replies (2) of 29386

Craig, <<Did you note the difference between switch latency on the same ASIC (540ns) versus the switch latency across ASICs (1.7us)?>> <<I realize that it isn't a big deal, but it might indicate that further ASIC integration could keep latencies low.>> My understanding is that the MKII used five ASICs: four 4-port ASICs and one "crossbar" chip. I wonder if the crossbar ASIC accounts for all of the difference in latency, or if other components contribute a significant amount. I was told by Cal Nelson at the annual meeting that a 4 port switch would require only one ASIC, i.e. no crossbar. This would seem to support your assertion that further integration could reduce latency. Greg

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