Robert,
I re-read the Intel paper, and you are correct--the gate length IS 0.13µ for NMOS and 0.15µ for PMOS. It would appear that Intel is just grouping their technology under the generally accepted SIA Roadmap gate lengths (0.35, 0.25, 0.;18, 0.13, 0.1 -- each differs by the square root of 2), so this is their "0.18 technology."
With regard to the length definitions:
Essentially, the gate length is the physical length of the printed gate (sometimes it takes other factors into account).
The poly-gate length (poly length), although sometimes considered synonymous with physical gate length, is more often defined to take the subdiffusion and/or tip regions into account. That is, the "poly length" is the length from the edge of the drain implant to the edge of the source implant. This is also the "first order" effective channel length.
The effective channel length is the distance from the edge of the source depletion region to the edge of the drain depletion region, each of which extend from the boundary of the source and drain region into the channel (actually the depletion region extends ever so slightly into the source and drain as well, but that doesn't affect current, which is the whole reason we care about the effective channel length). The effective channel length used to be pretty much the same as the poly length, but now that the devices are so small, the depletion regions are a large fraction of the channel length.
I don't know where Yousef got 0.08 as the effective channel length, but he could be right. The effective channel length is actually a function of the applied voltages. When a large voltage is applied to the drain (after the current 'saturates'), the depletion region increases and the channel shortens. The importance of the effective channel length is that the drain current provided by the transistor is inversely proportional to the effective channel length (and directly proportional to the effective width). Because of this, the effective channel length can actually be a number which does not really have any physical meaning, but rather "fits" the data.
Hopefully this is useful. It's a lot easier to explain with a picture of a MOS transistor!
Regards,
Steve |
