>>Katherine, >>>Sure, bad processing is bad processing, and yield and reliability are
related on
individual wafers. But that's not the same as implying, as you did, that an entire
fab's output of *wafers that passed final test* is unreliable.<<<
It's not my implication, it's IBM's words (hate to make statements based on another
company's words, but that is what they said at a recent conference). Doesn't it
make sense that a particular wafer, which could have had poor registration WRT
masks or reticles, or some other anomaly, would have marginal, some "good", some
bad, die all over the wafer? <<
I believe I said pretty much the same thing in my note. My problem arises when you try to generalize from *individual* maverick wafers to an *entire fab*, with *no* information about what caused the yield problems or how AMD handles the maverick wafers.
Do you recall at which conference IBM made this presentation? There's a good chance I have the proceedings and can look up exactly what they said.
Katherine |
