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Technology Stocks : Xilinx (XLNX)

XLNX 194.92

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Feb 14 4:00 PM EST

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To: Skeeter Bug who wrote (2162)	12/29/1998 4:24:00 PM
From: Bilow	Read Replies (1) of 3291

Hi Skeeter Bug; Tell that to my current employer! (They still are paying me less than OJ paid his lawyers, and I find that annoying...) By the way, I left off two carry modes available in the new Virtex parts... These modes use only a single mode pin, but with three data inputs. In the descriptions below, the mode pin is identified as "M", while the data inputs are A[n:0], B[n:0], and C[n:0]. The result is given as S[n:0]. Third Virtex mode (I'm ignoring certain redundant modes.) Any two functions out of the following: S[n:0] = A[n:0] + B[n:0] + CIN S[n:0] = A[n:0] - B[n:0] - CIN S[n:0] = A[n:0] + C[n:0] + CIN S[n:0] = A[n:0] - C[n:0] - CIN Fourth Virtex mode (uses MULT_AND): Any function out of the following: S[n:0] = A[n:0] + B[n:0] + CIN S[n:0] = A[n:0] - B[n:0] - CIN Plus, any function out of the following: S[n:0] = C[n:0] + CIN S[n:0] = - C[n:0] - CIN. This last function is incredibly useful. It provides a way of initializing an accumulator with a seperate input. What can I say, it was late... -- Carl

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