Formerly About Advanced Micro Devices Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: Ali Chen who wrote (44623)	1/3/1999 12:58:00 PM
From: Elmer	Read Replies (1) of 1571687

Re: "<As for latencies, I didn't mention them so how do you figure I have a problem?> Exactly because you didn't mention them :) " Ali, the latency problem cannot improve for the K7 when the L2 is off board, in fact it will get worse. If I had mentioned it, it would only have strengthened my case. Re: "The same holds for caches - you are trying to speculate about multiple streams of data blowing in and out across ridges of cache boundaries at two or three levels, along with chaotically mapped virtual pages, by using your only wet finger. No way Elmer." Which proves the old saying, "If you can't dazzle em with brilliance, baffle em with Bll Sht".... Doesn't work Ali. No matter how many multiple streams, no matter how many cache boundries, no matter how many levels or virtual pages, the data will be traveling at 1/6th the rate it would be if the L2 were onboard. EP

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next