wily, just read all of the good stuff. i think this article settles the k7 question.
AMD's K7 processor to support Rambus
By David Lammers
EE Times
(10/08/98, 2:58 p.m. EDT)
SUNNYVALE, Calif. — Any thoughts that Advanced Micro Devices Inc. might hoe a different next-generation-memory row than Intel Corp. were quickly put aside, with its Thursday announcement that it would use the Rambus technology.
The initial implementation will be to develop a chip set that will support Direct Rambus DRAMs with AMD's forthcoming K-7 processor, and AMD said it has test chips functioning with the Rambus Asic Cell (RAC) working at full-speed, 800-MHz operation.
While the K-7 processor initially will be targeted at servers, AMD said that the Rambus technology “will be the main memory interface for future personal-computer products,”according to S. Atiq Raza, AMD executive vice president and chief operating officer. “Direct Rambus interface technology provides AMD with a high-performance, mainstream, low-risk solution that adds value across AMD's processor product line. In addition, this technology offers scalable configurations from low-end consumer products to high-end enterprise computing systems and economies of scale due to worldwide supply and broad industry support.”
Subodh Toprani, a vice president at Rambus Inc. (Mountain View, Calif.), said “this is goodness. Between Intel and AMD, Rambus is now designed into the two main processor suppliers to the personal-computer marketplace.”
He said AMD's decision is far more important than recent moves by three chip-set vendors to support the Virtual Channel Memory architecture, which could be combined with the SL-DRAM to form a potential source of competition to the Direct Rambus DRAM.
Moreover, Ramtron International Corp.'s Enhanced Memory Systems subsidiary has filed suit against NEC Corp.'s Virtual Channel Memory. EMS claims that the VCM Synchronous DRAM infringes on U.S. Patent No. 5,721,862, covering the Enhanced DRAM licensed to Siemens and IBM Microelectronics.
The lawsuit, filed in U.S. District Court in San Jose, Calif., asks for a preliminary and permanent injunction against NEC, along with unspecified damages. While EMS and Ramtron will not address specifics of the case, the patent is one of 12 that have been applied for, specifying access methods for a memory that combines DRAM with local SRAM cache on a single chip.
Craig Rhodine, vice president and general manager of EMS, said “the technology we have developed over the last four years is independent of I/O or interface details. The patent covers broad areas of cached DRAM.”
While VCM SDRAM often is positioned against Direct Rambus architectures, Rhodine hinted that a lawsuit against Rambus would be unlikely. VCM specifically deals with onchip DRAM bank latencies having memory masters control virtual channels with local SRAM page buffers for handling page misses. Rhodine said that “our patent covers ways of handling latencies with onchip SRAM and DRAM, while Rambus is dealing with a memory-bandwidth issue.”
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