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Politics : Formerly About Advanced Micro Devices

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To: Kevin K. Spurway who wrote (46312)	1/16/1999 8:04:00 PM
From: Elmer	Read Replies (1) of 1571902

Re: "I think you're right. But I think what he's saying is that Intel won't get very far (given the PII architecture inheritied by the PIII) in boosting the PIII very far beyond 500 MHz, until they do the .18u shrink." AMD says the K7 has been designed to, among other things, enable higher frequencies because of architectural changes. Implied in this claim is these architectural changes allow AMD to reach higher frequencies ...for a given process... then would be possible for the K6x. AMD indicates the K7 will appear at "above 500 Mhz" on a .25u process. I have reason to suspect that Intel has done the same "speed path optimizations" that we have been discussing for the K6x over the last few days. Clearly the added KNI instructions required a completely new device layout so all the timing analysis and early silicon debug had to be done anyway, so that was the time and place to spend those design resources fixing all the critical paths. I believe this is why the PII seems to have hit a wall at 450mhz. I believe you will be seeing PIIIs "above 500 Mhz" on Intel's .25u process as well. A .18u dumb shrink will add significantly to the top end, followed by a completely new 6 metal layer layout, again raising the bar. The real dramatic jump will be the next generation, Willamette. I won't say the frequencies being mentioned because so far they are just "foils" but it's pretty impressive, to say the least. For those out there who worry that we are approaching some fundamental limit to processor speed, all I can say is you can sleep easy, no end is in sight... EP

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