PAi-
<< The problem is that their (Korean) chip size reductions are lagging behind that of companies such as MU and Toshiba. In fact most of their output is at a chip size of 100mm2 or above. Design rules unless in context with overall chip die sizes and yields are misleading. >>
Let's put some data up shall we?
Micron's 64mb MT4LC16M4H9 at 0.27 micron is 120.0 sqmm
Samsung's 64mb KM44S8030BT-GL at 0.28 micron is 98.3 sqmm!!
MU's 0.25 micron process yields a die size at 97.3 sqmm
Siemen's 0.25 micron 64mb part is 82 sqmm, which would be close to Toshiba's 79.3 sqmm since they use the trench capacitor.
MU's 0.21 process has die sizes in the low 50's
Fujitsu's 0.22 process gives die size of 51.3 sqmm, but not in production yet.
What can we conclude from this?
(1) MU has the competitive edge because they produce shrinks faster, and take shrinks further for each density. MU will probably take 64mb to at least 0.15 or lower.
(2) Siemens, Toshiba, and IBM have fundamentally smaller cell sizes through their use of the trench capacitor initially, but further data show that their shrink factor is less efficient so stacked capacitor designs can catch up. The accounts for less than 15% of the market.
(3) The Koreans and the Japanese can design small die sizes just fine, thank you.
<<AS far as capex concerned, I have reservations that fund procurement during CY99 will be as easy as it has in the past, still considering that the debt/equity ratios are (I believe) 600% and that the country is still under IMF supervision.>>
LG reached near 600% before plans to shed their TFT-LCD group, under 400% after. Hyundai Electronics has never been over 300%. I would agree there is work to be done, but they are also committed to spend just enough to remain competitive. This will be in the plan, otherwise the plan would not be worth very much.
I have an impression now that your key source knows LG quite well, perhaps Toshiba, but not much else.
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