Paul,
Re: "Do you think Motorola Engineers are going there to help bring up that
process?"
No Paul, I don't think that Motorolo will help bring up that process ... That
will fall to AMD engineers. If there is a problem (especially due to "not
copying exactly", AMD will be on there own. Please see the following
article posted by Kash -->
"AMD says Dresden fab
rivals latest Intel plants
By Jack Robertson
DRESDEN, Germany -- For a chip maker that nearly stumbled in its last
major manufacturing upgrade, Advanced Micro Devices Inc. seems to have
made it back into the race. Not only is it calling its latest wafer fab
a world-class plant but it claims it rivals any production facility of
Intel Corp.
It had better. AMD's new Fab 30, which is located just outside this German
city, is a multibillion-dollar, bet-the-company gamble that will play a
leading role in the chip maker's all-out fight with Intel in the global
microprocessor market.
In one of the first previews of the fab in November, Jack Saltich, vice
president and general manager of the Fab 30, told SBN that the plant had
been designed from the ground up to use next-generation production technology
from the beginning.
Production will start up using copper interconnects, low-k dielectrics,
and SMIF (standard mechanical interface) automation, he said. While AMD
will use its proven 0.22-micron process to get its new fab into mass production
as quickly as possible, it expects to go into full production in the second
half of 1999 using 0.18-micron design rules. That would put AMD neck-and-neck
with Intel's latest fabs, Saltich said.
First silicon is due in January on the Dresden plant's primary product,
AMD's next generation K-7 microprocessor. The fab will be capable of ramping
up to 20,000 8-inch-wafer starts a month. A second phase would double that
rate, but no decision has been made on when that expansion would start.
AMD is counting on its new German fab to put to rest the problems that roiled
its operations last year when it was trying to move from 0.35-micron to
0.25-micron geometries at its Austin fab. "We don't foresee any major problems
ramping up with the industry's most advanced process technology," a confident
Saltich said. AMD has started qualifying the tool set at the fab here and
"we haven't encountered any trouble yet," he said.
Fab 30 can be launched with copper processing, Saltich said, since it was
designed to handle the new interconnect layer. "We [were able to] plan the
cleanroom and tool arrangement to solve the contamination problem," he said,
noting that retrofitting existing fabs to use copper interconnect rarely
works. For that reason, AMD's Fab 25 in Austin, which is now moving to
0.18-micron design rules, will continue to use aluminum metalization.
AMD wanted to use copper processing from the beginning in Dresden to build
higher performance K-7 MPUs. Copper tooling and processing also were less
expensive, Saltich added, because metal etch with corrosive gases has been
eliminated. And the damascene copper process is one more factor in shrinking
the die size, he said, which lowers costs by spreading production expenses
over a larger number of chips.
AMD got its copper interconnect technology from its technology alliance
with Motorola Inc.'s Semiconductor Products Sector. "We have German
engineers working in Motorola's MOS-13 fab in Austin who will help us
implement copper here," Saltich noted.
Dresden also will introduce low-k dielectric materials as processing moves
to 0.18-micron feature size. This will increase K-7 speeds by greatly reducing
the intra-layer and inter-layer capacitance, he said. AMD hasn't settled
on the low-k material it will be use, but barium-strontium-titanate (BST
and paraline compounds are candidates.
Because Fab 30 is new, it could make maximum use of SMIF pod automation.
Much of the fab can operate with a less-expensive Class 100 cleanroom
environment since the wafers are contained in a protected pod, Saltich said.
The new fab uses 248-nm wavelength step-and-scan exposure tools from ASM
Lithography to pattern the 0.18-micron feature size on wafers. Hard phase-shift
masks will be used, Saltich said, to extend the krypton fluoride deep-UV
lithography system to 0.18-micron geometries. And "there's no question,"
he said, that the same technology will be able to push the 248-nm tool to
0.15-micron feature sizes. That would probably happen in the second half
of 1999, he predicted.
For the sake of plant reliability, the Dresden fab will also obtain its
power from an on-site independent energy plant, which is a joint venture
of Meissner + Wurst, Air Liquide, and the local Saxon state utility.
"Early on, we decided it was too risky to rely solely on the public power
supply," an AMD spokesman remarked. "We are the sole customer" of the joint
venture, he said.
The state-of-the-art equipment installed at Fab 30 includes chemical vapor
deposition (CVD) systems from Applied Materials and Inc. Novellus Systems Inc.,
and physical vapor desposition (PVD) from Applied. Etchers came from Applied,
Tokyo Electron, and Lam Research Inc. Tokyo Electron Ltd. supplied the
trackers, and Applied and SpeedFam International Inc. provided the chemical
mechanical polishing (CMP) systems. Inspection tools came from KLA-Tencor
Corp."
Make it So,
Yousef |
