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Politics : Formerly About Advanced Micro Devices
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To: RDM who wrote (47846)1/29/1999 5:24:00 PM
From: Tenchusatsu  Read Replies (1) of 1571811
 
<I just feel that the problems of point to point are more manageable than a multipoint bus. The proof is in the pudding. Testing is a problem both ways.>

If the P2P protocol allowed for fewer pins on the bus, I would agree. But AMD's K7 bus is a full 64-bit bus, complete with decoupled address, request, and cache snoop pins. The fact that Slot A is mechanically similar to Slot 1 suggests to me that the K7 connector will have a similar number of pins as a Slot 1 processor like the Pentium II. A 4-way multiprocessor K7 server will have four times as many pins as a 4-way Xeon server. (Actually, it's more like three times as many pins, since Xeon's Slot 2 has more pins than Slot 1.) The more pins there are in the platform, the tougher it is to manufacture boards around that platform.

Since Intel is likely going to stay with multiprocessor buses for a while, I think my employer would disagree with the notion that P2P is more feasible than a multipoint bus.

Tenchusatsu
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