Technical discussion: simulation
>>Simulation really can't address the details related to signal fidelity. To produce a repeatable module really takes some trial and error .. could be considered an Art as opposed to a Science.
The whole topic of impedance matching (and reflection reduction) is often referred to as "black-magic". (A certain practice may work in one situation, but differently in another)<<
I think we're discussing apples and oranges. My first post referred to simulation at the instruction level. What you do is build an insanely expensive trace machine, capture as large a trace (in essence, which instructions are running) as you can, and then run these against a piece of software that simulates the system.
I believe what you're discussing is simulation at the digital design level -- which is rapidly becoming simulation in the digital/analog design level due to transmission line effects (and other effects) that occur at increasing speeds.
I've written instruction trace simulators and I've written software that allowed analysis of bounce diagrams in high speed circuits, and while none of this is trivial, it's not clear to me that I'm an artist. At least, when I look at Kandinsky, or Alvarez, or Sage, or any of the other artists I really like -- I think that they do and what I do (or used to do) are fundamentally different things. But that's just my opinion...
Taking this back to Rambus - when people on this thread read that Rambus has higher bandwidth per pin than conventional solutions, you should realize that this is a fundamental advantage over time. Put simply, as the frequencies increase, you want to have the least number of physically closely located signal paths that you can (this is what Mr. Grist is referring to concerning reflection reduction and the like). This is a fundamental reason that Rambus is on an S-curve that's above the S-curve of conventional DRAM interconnect techniques.
My best, |
