Toshiba MPU plans rise on Playstation's wings
By Rick Boyd-Merritt
EE Times
(02/19/99, 10:49 a.m. EDT)
SAN FRANCISCO — Toshiba Corp. will charge into high-end networking markets next month when it rolls out a new family of 128-bit MIPS-based embedded controllers. The processors, aimed at high-end routers and switches, will be the first offspring of a new MIPS core co-developed by Toshiba and Sony Computer Entertainment for a media processor expected to power the next-generation Sony Playstation.
The two companies described both the new core and the media processor at the International Solid State Circuits Conference here this week. The media processor will rely on Direct Rambus DRAMs and 0.18-micron process technology to power up the new video-game console, which may not be released until at least next year.
"I am very, very concerned about the state of Direct Rambus development," said Ken Kutaragi, chief executive officer of Sony Computer Entertainment America and a lead designer of the Playstation. "Many, many companies are still developing their first Direct Rambus products, and 133-MHz SDRAMs and DDR DRAMS are not stable. The availability of 0.18 silicon is also a big concern. There will be no significant 0.18 foundry capacity until the end of the year."
While Sony is not yet ready to tip the schedule for its next-generation Playstation, Toshiba is set to roll versions of the new MIPS core in standalone products. The embedded family will bundle multiple 100-Mbit/second MACs and DMA controllers, and includes versions without floating-point units.
"We are developing a family of products for networking applications," using some of the technology from the Playstation CPU core, said Michael Raam, director of engineering for embedded processors at Toshiba's San Jose office. "Most people in the networking business are using Mips-based processors, including Cisco, and if you look at the Mips lineup out there, it is seriously lacking of integrated ASSPs for networking and datacom."
Besides the new embedded family, the Playstation work has also helped Toshiba reinvigorate its own efforts to design a range of media processors after previous efforts to back high-flying Silicon Valley startup Chromatic Research crashed and burned. The new chips will combine a RISC core with a variety of media engines handling discrete cosine transform and vector quantization functions tailored to applications such as digital TV and DVD players.
"We learned a lot from this [Sony] project," said Mitsuo Saito, general manager of Toshiba's system ULSI engineering lab in Kawasaki, Japan. "We think we have learned how to build a media processor. You have to have a good compiler and very low context switching. In Silicon Valley they don't know the CE market at all."
Sources close to Toshiba said the Playstation work has forced Toshiba to significantly bolster its microprocessor design capabilities, an effort that spawned both the new embedded and media processor families. "This was a major CPU design project, done from scratch," said Raam.
As for Sony, the new Playstation marks an aggressive effort to leapfrog the performance of Nintendo and Sega consoles with a high performance console that still meets consumer market costs. Many details of the system are still unclear-including a graphics chip designed by Sony that is said to contain as many as 20 million transistors.
Sources describe the graphics chip as a fairly conventional graphics processor, but implemented on a grand scale. "Our target is a crazy level in bandwidth, pixel rate, design rules and transistor count," said Kutaragi. "It's a very, very cutting edge chip."
The media processor described last week includes three processing units which work in relative independence, linked by internal 128-bit buses to deliver estimated performance of 5 Gflops or 30 million polygons/second with lighting and fog features enabled. The chip sports an effective bus bandwidth of 1.7 Gbytes/second and supports two Direct Rambus channels.
Two of the on-chip processing units are fairly straightforward blocks. An image-processing unit includes an MPEG-2 decoder which also handles RGB color space conversion and vector quantization chores. A vector unit handles geometry processing operations. A thirdunit consists of the MIPS core working in tandem with a separate vector unit to handle novel functions Sony describes as the essence of the next step in gaming graphics and has dubbed behavior synthesis.
"For example, in a fighting game if someone throws a punch and they are wearing loose clothes, those clothes move," said Masakazu Suzuoki, director of the software R&D division at Sony Computer Entertainment. "In a racing game a speeding car might move up and down on its suspension. Plotting these motions requires solving unique kinds of differential equations."
All three processing units pass their display lists independently to a graphics interface unit which arbitrates among the net lists and ships them over a 64-bit bus to a graphics chip. A ten-channel DMA controller handles transfers over 128-bit internal bus running at half the 250 MHz CPU clock cycle. The final chip is expected to run significantly faster.
One problem with the design is heat. It currently dissipates 15W and requires a fan for air cooling, something familiar to the world of Pentium PCs but novel among consoles.
The MIPS core at the heart of this device has 32 128-bit registers and contains two 64-bit integer pipelines which can combine to 64-bit data elements into a 128-bit word. It implements all the MIPS III and most MIPS IV instructions in addition to 107 new SIMD multimedia instructions such as parallel add/subtract, multiply/divide and min/max operations. Toshiba and Sony are not disclosing details on 17 of the new instructions. The processor can retire one 128-bit load/store and one 128-bit multimedia instruction per cycle on every cycle and with compiler optimizations will deliver 500 Dhrystone Mips, Raam said.
Standalone versions of the core could find strong demand in high-end network gear where it will run head on with competition from a number of chips from startups and majors, including the AltiVec PowerPC launched last year by Motorola. "For routers and anything connected to the backbone of the network the faster you can run these things, the better," said Tom Starnes, embedded analyst at Dataquest.
"Mips is really the only architecture with a 64-bit embedded processor today, but the question is whether 128-bit is really what people are looking for."
For its part, the MPEG-2 support in the media processor, signals the new Playstation is likely to be the first console to use DVD, a move analysts were divided over.
"It would be a big thing to bring DVD-quality video to a game," said Peter Glaskowsky, senior analyst for 3D graphics and multimedia at the Microprocessor Report. If launched this year, a backward-compatible Playstation II could steal thunder from Sega's Dreamcast console which is expected to hit the U.S. market later this year. The Dreamcast uses CD-ROM media and a Hitachi SH-4 which delivers an estimated 2 million polygons/second, said Glaskowsky.
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