"Product of the Week"
"GateField Delivers 0.25 Micron ProASIC Samples to Actel"
"The manufacturer says . . ."
"GateField Corporation announced that it has delivered working engineering samples of its 0.25 micron non-volatile and re-programmable ASIC technology to its exclusive sales and marketing partner Actel Corporation, Sunnyvale, CA. The new devices have been developed and manufactured using the leading edge 0.25 micron embedded Flash process of Siemens Semiconductor Group, Munich, Germany."
"Actel has tested and evaluated this new ProASIC technology and the associated design tools and has engaged with several customers"...
..."Dr. Saxe concluded by stating,''The successful development of the new 0.25 micron ProASIC technology would not have been possible without the strong support and excellent capabilities of strategic process technology partner Siemens.''
"Dr. Franz Neppl, Siemens Semiconductor, vice president of engineering, signal processing & control, commented, ''We are very pleased with our strategic partnership with GateField. Their team worked very closely with our experts over the last 15 months. The fact that the first silicon provided fully functional ProASIC samples highlights the success of this cooperation"...
"Murray Disman says . . ."
"It is fortunate for the FPGA using community that GateField's 0.25-micron ProASIC devices will now get to see the light of day. A number of important advantages are claimed for this technology and architecture, and it is important that the FPGA designer have the opportunity to evaluate these claims - in hardware."...
..."GateField's backend tools, which will be sold by Actel, work well in traditional ASIC design flows based on Design Compiler. In fact, GateField initially targeted ASIC designers for its ProASIC FPGAs since very little training was required to implement a design. GateField has now expanded its tools to where they interface with almost all of the third-party FPGA front-end design packages. Actel, depending on the success of its ProASIC marketing effort, intends to integrate the ProASIC backend tools into the integrated design environment that it recently introduced for its antifuse and SRAM-based FPGAs."
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