Well...OK... I will save those pages - thanks for reminding me. Tomorrow morning I will contemplate the Science Magazine article some more and post some comments. I think we are developing a clearer picture of the present situation and what is likely to come.
Fred:
<<Some quibbles:
"24 to 26 masks w/ 5 metal layers" from OUM.pdf>>
That is from page 26. However, that page refers to complete "SOC" (System on Chip) devices - that is, integrated memory and logic cells to make, for example, a complete computer. Page 25 says that the addition of the OUM cells only adds 2 to 4 mask steps to the usual CMOS logic devices. So, I still think the basic Ovonic memory unit is just two wires (from the same conductive layer) on the edges of a Chalcogenide area formed from one layer (on some substrate material that is always there) - really just two layers of material for the memory cell. I could be wrong, though, so let's keep digging.
<<"programming [aka write?] pulse width at 50 nsec" ibid, slide 14
now down to 30nsec per an email to me from Tyler>>
Right, but there is more to say about this. First, a digression. I had foolishly been trying to read the OUM.pdf file by using my browser. Miserable experience - horribly slow and nearly all of the text showed up as black boxes instead. After downloading the pdf file and reading it off-line, I found I had been misinterpreting some of the graphs.
Seems that a wide range of speeds have been mentioned. In addition the 50 ns and 30 ns values Tyler has mentioned, he (presumably) also says:
From page 7 of this year's ECD Brochure - "1 ns", which is what I was quoting and what is apparently a future reasonable value.
From page 12 of the OUM.pdf - 3 ns (with 4 milliamp reset current)
From page 17 of the OUM.pdf - "Power to Reset in 5 ns" (this complicated graph shows the trade-offs between substrate material, cell size, and power or current to reset the cell.
From page 19 of the OUM.pdf - current = 90 microamp, voltage = 2.5 volts, pulse width = 5 ns (describing a reset pulse)
The reason for the wide range of values is that present real devices as well as model studies are being referred to. I think Tyler has said that physical OUMs to date have been fabricated in lesser facilities - with, consequently, relatively large device dimensions and, hence, relatively poor characteristics. Note that most of the OUM.pdf is devoted to model studies. In particular, note page 17, which addresses a wide range of parameters and indicates a wide range of possible device characteristics.
Are the model studies realistic? Do they refer to devices that can be made without long and difficult development activities? Tyler has said yes. His studies show that, for physical reasons, the devices work better with reducing dimensions. In other words, the performance of OUMs is limited only by lithograph technology; and existing physical OUMs have not used state-of-the-art lithography. Looking closely at page 17, note the two "circled" areas labeled "Structure 1" and "Structure 2". I think these probably outline what can be done with present lithography, and the associated parameters appear consistent with the page 19 reset-pulse data (see the page 19 reference above). I am speculating, of course, but I think it is a reasonable guess that the page 19 data is the goal for soon-to-be OUMs, if not the first commercial ones.
I find all this encouraging as well as interesting, but it is difficult, to say the least, to know when ECD will see revenue from OUMs. Do I remember correctly that Tyler has indicated 18 months?
Ray
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