Group proposes next-generation DDR standard
By Jack Robertson
Electronic Buyers' News
(04/09/99, 04:58:44 PM EDT)
A broad-based industry-standards group is quietly releasing the first details of a double-data-rate SDRAM follow-on specification, expected to run two to three times faster than today's highest-speed DRAM.
Known as DDR-2, the next-generation standard could result in silicon as early as 2001, and is being touted as a replacement for DDR SDRAM in a wide range of PC, workstation, and graphics applications. A JEDEC subcommittee comprising 50 companies is scheduled to meet April 21 and 22 in Tokyo in an effort to ready a final draft specification by June.
Joe Marci, chairman of the JEDEC panel and technical manager of ArtX Inc., a Palo Alto, Calif., graphics-design company, said DDR-2 will allow a natural migration path from the DDR SDRAMs slated to enter the market later this year.
"We're drafting specifications to get a major increase in data rate, ranging from 3.2 Gbytes/s to 4.8 Gbytes/s," Marci said. The interface's top-end speed would be more than twice that of emerging DDR SDRAM, and as much as three times as fast as the 1.6-Gbyte/s bandwidth of an 800-MHz Direct Rambus DRAM.
Art Kilmer, manager of DRAM applications for IBM Microelectronics, Burlington, Vt., said the evolution to DDR-2 would give PC OEMs and graphics-system and electronic-game producers "the assurance they can design-in DDR now without the need to make any major changes in upgrading to the next-generation DDR-2 memory."
In addition to serving as a DDR follow-on, Marci said, the DDR-2 interface is adopting some aspects of the now-defunct SLDRAM architecture-specifically the SLDRAM I/O interface and clocking scheme. "We wanted to invent as little as possible," he said.
Both Marci and Kilmer believe DDR-2 can be produced with almost no price premium over its double-data-rate predecessor.
"We've eliminated more costly custom logic cells that are needed in both DDR and Direct Rambus by tailoring the DDR-2 to use standard logic cells and design tools that are already pervasive in the chip industry," Marci said. "Using standard logic cells also gives you great flexibility in adapting future versions, rather than having to make a complete new custom logic design."
Marci hailed DDR-2 for its potential to curb the trend toward segmentation within the DRAM market: "It will truly be a general-purpose commodity memory that can be produced in very high volumes and low cost to meet the needs of customers, from servers to PCs to telecommunications to electronic-game machines."
Industry consensus associated with DDR-2 was achieved by bringing all parts of the supply chain-from OEMs to chip makers-together to draft the standard, he added.
"We had every DRAM supplier, most chipset makers, memory-module firms, and a large group of OEMs hammering out the DDR-2 specification," Marci said.
Because so many companies were involved in the process, observers expect the final draft to get quick JEDEC approval-perhaps by the fourth quarter. IBM's Kilmer said that as soon as the draft is ready, chip companies can start working on preliminary designs, leading to first silicon early next year.
Not actively involved in the working sessions was Intel Corp., which has generally viewed DDR as a threat to its selection of Direct RDRAM as the industry's follow-on DRAM architecture for the next five years. Marci said Intel had observers at some of the earlier JEDEC sessions, but they did not participate.
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