SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC)
INTC 35.53-1.1%Nov 14 3:59 PM EST
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Scumbria who wrote (78432)4/11/1999 8:51:00 PM
From: Tenchusatsu  Read Replies (2) of 186894
 
<don't expect to see anywhere near the same kind of benefit from a large onboard L2 that you do with a large onboard L1 (like K7.)>

Uh, Scumbria, we've been through this before. You and I both agree that the L1 cache is "oversized" in the case of the K7. And you and I both agree that its longer latency does impact performance somewhat, even if a lot of it is hidden in the pipeline or the out-of-order execution. Of course, the K7 will make up for it with a lower L1 miss rate, which is absolutely vital if their initial K7 comes with off-chip L2 cache which is slower than that of a Pentium II 400.

In other words, Intel will speed up the L2 cache by putting in on the die, while AMD will sacrifice a little L1 cache performance in order to keep from going to the L2 cache in the first place. Different approaches, different requirements, different performance characteristics. The oversized L1 cache is not the panacea that you make it out to be.

Tenchusatsu
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News