Rambus Adds 700-MHz Spec To Help DRAM Makers Improve Yields
(04/13/99, 9:53 a.m. ET)
By Jack Robertson , Semiconductor Business News
Rambus has added a 700-MHz speed grade to its Direct Rambus DRAM specification in a move to help DRAM suppliers improve early yields of the device.
Although DRAM makers refused to discuss specific yields, some memory makers privatelyconfirmed a significant portion of the industry has been hard-pressed to achieve the 800-MHz frequency defined in the original spec. Rather than their having to struggle with poor output, it is now hoped suppliers will sell large volumes of the 700-MHz Direct RDRAM devices while they continue to refine their manufacturing processes.
Contacted this week, Hitachi Semiconductor (America) in San Jose, Calif., said its 0.18-micron processing lines are making 800-MHz chips. "I suspect companies that don't have 0.18-micron processing may have trouble getting adequate yields of 800-MHz chips and may need the lower speed specification," said Bob Fusco, Hitachi's DRAM product marketing manager.
The decision to tinker with the specification just six months before the technology's volume introduction has drawn a variety of responses from industry pundits. Rambus proponents point to the change as an effort to accommodate customers, while detractors say the 11th-hour alteration is another sign that the platform may be unstable.
In an interview, a spokesman for Rambus' design partner -- Intel -- confirmed a 700-MHz speed has been inserted between the original 600- and 800-MHz Direct RDRAM versions.
A Rambus official said the new spec was adopted on the recommendation of Intel and DRAM licensees. "They felt it would be an advantage to them and give them greater flexibility in the market," said Subodh Toprani, vice president and general manager for the logic products division at Rambus, in Mountain View, Calif.
Analyst Robert Merritt of Semico Research, based in Silicon Valley, said the 700-MHz speed will yield a lesser 1.4-gigabyte-per-second throughput, compared with the 1.6-GB-per-second bandwidth of 800-MHz Direct RDRAM. While the addition represents no major change to the Rambus architecture, he said, the last-minute addition could create more uncertainty for the memory chip, which has already been delayed until late in the third quarter.
Suppliers said the change resulted from stricter testing guidelines recently introduced by Santa Clara, Calif.-based Intel, changes that are taxing the ability of new test equipment to stay within narrow timing parameters.
"Yields of 800 MHz are not significant," said one vendor. "The test equipment has limitations. It hasn't evolved far enough."
Most DRAM vendors contacted had yet to receive clearance from Intel to discuss the new speed grade. But Will Mulhern, product marketing manager for advanced DRAM chips at NEC Electronics in Santa Clara, Calif., said in theoretical terms, the inclusion of a 700-MHz speed grade would tend to send the industry two messages: 800-MHz yields are generally low, and the 600-MHz down-bin is perceived as too slow by OEMs.
"In general, the only reason you introduce a new speed grade is to improve the yields for vendors," Mulhern said.
According to Toprani, the changed spec proves Rambus' commitment to flexibility, and a third speed option will only broaden the base of applications for the next-generation memory chip. The Intel spokesman said the companies were simply responding to market demand.
Whatever assurances Intel and Rambus may offer, the Direct RDRAM picture has become increasingly clouded. In February, after Intel reported a delay for its Rambus-enabled Camino chip set and certain peripheral devices, several DRAM companies said the 800-MHz speed would be difficult to attain without a switch to 0.21- or 0.18-micron processing -- an expensive leading-edge geometry.
More recently, some DRAM makers said they'd received notice of a flaw in the Direct RDRAM design that causes data to be misread to the bit register. As previously reported, the DRAM vendors said the bug has triggered an engineering change order that could require a new silicon mask set.
Toprani confirmed that an engineering change was issued, but he said, "It's a non-issue for present-generation Direct Rambus DRAMs. It's a change that can be implemented when manufacturers move to the 256-megabit [Direct RDRAM] generation.
Both Rambus and Intel said any changes to date have had no effect on Direct RDRAM's revised September introduction date. |
