Ten, <Believe me, Ali, your assumption is plain wrong.> You listen. I do not do assumptions. I speak from facts and CORRECT PLANNING OF DATA FLOWS in current PC architectures. What have escaped your attention is that before some agent (PCI of AGP or NIC) wants to access memory, the data must be prepared (usually by CPU). You are effectively saying that some uneducated idiot gets data from memory, flushes processed data back, and let PCI/AGP to get them again, or the traffic across the memory bus is TRIPLED. There are many idiots, so what? In this case your chipset architecture does not matter until you get to better memory, and K7 or P-III will have not much of a difference, you're right. What I am saying is that with more correct data stream allocation, the doubled CPU bandwidth of K7 system will help in correctly written application, while the Pentium system, with matched bus-to-memory bandwidth, will not. (I guess we will not fall into details of how to avoid the cache coherency overhead and some other tiny details..) <EOD> (End Of Discussion). - Ali |