Intel supports 700-MHz Rambus as Double-Data-Rate backers ready 266-MHz parts -- Rambus slows as DDR gains in DRAM race
techweb.com
David Lammers
Santa Clara, Calif. - Intel Corp. continued last week to back off on its speed claims for Direct Rambus, leaving systems OEMs skeptical about the value of the proprietary technology. At the same time, the relatively quiet multivendor Double Data Rate (DDR) DRAM effort showed new signs of aggressiveness, boasting 133-MHz DDR parts and dropping hints of higher speeds. Overall, the message for the personal computer main-memory market seemed to be that DDR DRAMs will soon approach the peak throughput, and in fact beat the latency of the Rambus devices.
Intel, which initially insisted that Direct Rambus channels would operate at 800 MHz-which is actually marketing-speak for a 400-MHz synchronous bus transferring data on both rising and falling clock edges-said its Camino chip set also will support a 700-MHz spec, one that lets the DRAM manufacturers use a higher proportion of their yields. An Intel spokesman said internal discussions are under way about support for a 500-MHz speed bin.
In today's uncertain environment,where Intel's decision to support the Rambus architecture is hotly debated, the 700-MHz speed grade is seen as another indication that Intel and Rambus won't be able to deliver the technology on time and at prices that desktop PC buyers will tolerate. Others argue that the jump in performance Rambus promises-originally to 1.6-Gbytes/second peak bandwidth per channel-is the only way to entice buyers to purchase high-end systems and enable a new class of bandwidth-intensive applications.
The spokesman said Intel had no plans to delay further the third-quarter commercial introduction of Rambus-based desktops, following the decision at the Intel Developer Forum to postpone the launch by three months, until September.
Through most of last year, Intel and Rambus touted 800-MHz performance. But with poor yields of those chips, Intel decided to support a 600-MHz spec for less-expensive desktops.
Steve Cullen, a memory analyst at market research firm In-Stat Corp. (Phoenix), said the 700-MHz speed "adds to the confusion" over Rambus and said "the performance vs. the price is still questionable."
But Cullen, based in the Boston area, said the 700-MHz speed grade will let DRAM manufacturers price their chips more reasonably. Prices for 800-MHz parts would have been even higher, he added.
Nearly all Rambus DRAMs shipping this year will have a density of 128 Mbits, for desktops with 128 Mbytes of main memory on a single Rambus In-line Memory Module, or RIMM. In-Stat predicts that at the chip level the premium for Direct Rambus DRAMs (R-DRAMs) will be 20 to 30 percent, perhaps more at the module level.
But Jim Sogas, a Hitachi America director in charge of its DRAM business unit, said the premium will be "60 to 80 percent, nearly two times [what it is now]. It looks pretty bad."
With DRAM makers struggling for a profit, none will price R-DRAMs below cost, he said.
Higher price, however, may not be the only discouraging factor. Sogas said overall performance of the lower Rambus speed grade would be no better than today's PC100 synchronous memories. Others have said that even with the fastest DRAMs, the difference in memory bandwidth would be visible only in specific situations. Consequently, Sogas said, Hitachi is pursuing the market for PC-133 SDRAMs, now shipping to server manufacturers, and will follow with PC-266 DDR SDRAMs.
Meanwhile, the DDR camp is preparing to move for the first time in years to a new I/O signaling standard. The first-generation DDR parts will use the LV-TTL interface at 3.3 V. A second generation, or DDR-2, will switch to Stub Series Terminated Logic (SSTL), a low-voltage-swing technology already in very fast SRAMs. The signaling technology promises both a cut in power and increase in operating frequencies in the messy, plug-in module world of PC motherboards.
Sogas also raised questions about the heat density of the Rambus parts. In many systems, seven of the eight chips on the module will have to be kept in "nap" mode, while one chip actively feeds data, increasing latency even further when another chip is accessed. The modules will require a large heat spreader to handle thermal concerns.
Sogas predicted that Intel will reconsider its Rambus decision.
An Intel spokesman said the company is sticking by its plan for a third-quarter introduction, though he declined to say if the Camino chip set was sampling. Support for a 133-MHz bus between the CPU and the system controller chip is seen as critical to the Rambus-generation rollout, and one cause for the three-month delay was the difficulty in supporting the faster processor bus with the Camino chip set.
Meanwhile, many DRAM vendors who have publicly supported Direct Rambus while privately complaining of shaky technology and runaway costs appear to smell blood. Sogas said an ad hoc group will announce the DDR-2 specification in a few weeks. "We don't want DDR-2 to be seen as just another Jedec option. The DRAM industry wants to coalesce on this standard," Sogas said.
While Intel struggles to ready its Camino chip set, other companies are working on core logic to support the PC-133 SDRAM. Via Technologies Corp. leads Taiwan-based companies that support PC-133 SDRAMs in PCs. After that, the transition to DDR versions would be followed by a switch to the DDR-2 spec and the SSTL interface. VLSI Technologies, Opti Inc., Micron Technology Inc., Acer Laboratories and FIC also are said to be working on core-logic solutions.
The DDR camp has not forgotten infrastructure requirements. Tony Ochoa, product marketing manager at Micro Linear Corp. (San Jose), said his company is developing active termination ICs for DDR-1 and DDR-2 systems.
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