Hi Rosemary; I thought I would go over to the Micron web site, and put together some commentary on JEDEC standardization of DRAM specifications from the viewpoint of a working engineer.
DRAM designers have dealt with minor differences between vendor's specifications in new DRAM technologies for all the 15 years I have been designing high speed memory controllers. While the different DDR SDRAM makers do have different specifications, the differences are quite minor, and it is usually possible to design a single controller that will work with multiple part sources. This is not some new "problem" of DDR, but is a very minor part of memory design. An example of how this sort of thing was done with the issue of initializing SDRAM is well explained by this Micron pdf formatted primer:
Achieve Maximum Compatibility in SDRAM/SGRAM Design
(pdf) micron.com
So lack of a JEDEC standard doesn't slow down use of a memory by very much. It may seem complicated to someone who doesn't live and breath memory, but for engineers, this is not a big deal. (We use stuff like this to give lame excuses to management on why we are missing the schedule for a project. Shhh! :)
Micron is a little late sampling RDRAM, but it should begin in a few months:
At the Micron web site:
micron.com
We have, as of today, RDRAM sampling is slated to begin mid-1999, with full production of specific components and modules by 4Q99 (see table).
DDR SDRAM is sampling now:
micron.com
and, in fact, started sampling back in September 1998:
"IBM is pleased to have the opportunity to evaluate Micron's DDR SDRAMs," said Mike Rubino, Manager of Memory Technology and Qualification, IBM Global Procurement. "We see strong potential for DDR SDRAMs in some of our server, workstation and networking products, and we are anxious to begin the evaluation process."
micron.com
though they were essentially impossible for small players like me to obtain at that time. Needless to say, RDRAM samples are unavailable to me right now. But DDR samples are widely available.
The part I'm drooling over for the next generation is this one:
(pdf) micron.com
which gives 1.3GB/sec per chip, and uses the simple DDR interface. It is sampling now, but I don't have any projects starting up to use it... Production is slated for June. This is a cool part because of the very high bandwidth achieved in a small package.
The reason I prefer the DDR interface to the RDRAM one is that I can drive a DDR interface from an FPGA, while RDRAM is too brutal to use so easily. SLDRAM was also too messy for an FPGA, and is now gone. So for small production volume systems, DDR takes the market. On the other hand, DDR also picks up the market for large volume production where large amounts of memory is required: servers &c. Rambus is king on systems in large production with a small amount of memory, as in game systems. The above DDR SGRAM should take some of that market share though, and eventually embedded DRAM (2-3 years) will take most of the rest of it.
-- Carl |
