Hi Dave B; The Rambus interface is very specialized in terms of voltages &c., plus, it requires a lot of other stuff that allows cancelling of propagation delay skews. Because of that, it is my belief that it is impossible to hook RDRAM up to an FPGA unless the FPGA has pins specifically designed to hook up to RDRAM. The problem is that an FPGA is by its nature, a general purpose device, but the RDRAM interface is very special purpose.
I considered using RDRAM a few months ago, figuring I would just reduce the bandwidth to something an FPGA could handle. But when I compared the ease of use, it was clear that I wanted to use DDR.
Yes, FPGAs can be designed from Verilog. Intellectual property is available for FPGAs as well as ASICs. Examples include things like Z-80 processor cores. Rather than Verilog, I prefer VHDL or schematics. (Verilog is easier to use than VHDL, it is just that I've used VHDL a lot more.) FPGA design is similar to ASIC design, except that (1) You don't have to write test vectors. (2) If you make a mistake, you can redo it easily. (3) ASICs workstations usually run Unix, while FPGA workstations usually run Windows NT or 98. (4) FPGAs are more limited in packaging options, pin types &c, but are a more standard part than an ASIC. (5) ASICs are at least 3 times faster than FPGAs, and use less power, less silicon, are more flexible, can include analog circuits, etc.
Incidentally, a common design sequence is to build prototypes in FPGAs, then convert the FPGAs to functionally equivalent but cheaper ASICs for volume production. Several companies in addition to ALTR and XLNX offer cheap conversions from FPGAs to ASICs. I haven't used one of those services in about 8 years.
The FPGA people over on the XLNX and ALTR threads will tell you that the FPGA market segment is growing at a faster rate than the ASIC segment (which is true) and that FPGAs are going to make ASICs obsolete (which is false.)
-- Carl |
