Tad, i have enjoyed your posts. i would argue that the 23% growth rate is quite low for xlnx looking out over the next 5 years. it is generally agreed upon by those watching the semi's that they are entering about a 2year boom cycle. if you were to use 30% and 35% growth numbers, what would your next target price be (very curious)? then again, all this projected growth seems, to me, to be more based on the past than looking forward. the new prices of programmable logic have proven an elastic market, coupled with the vacuum forming as the asic vendors move to std_cell, all bode well for higher growth rates for both xlnx and altr. The economies of doing std cell designs also bode well for pld's. As geometries shrink, mimium lots will yield 2 orders of magnitude more die than just 2 years ago. this translates into silicon prices (not counting prices) coming closer together for plds and the smaller asics. therefore, the price difference closes even more as the geometries shrink. this provides even more revenue potential as customers shift into the pld's with their shrinking premiums choosing the design flexibility and time to market as their reward for the reduce premium.
Remember, 7% seqential qtr growth compounds to 31% annual growth. Likewise, 10% sequential qtr growth yeilds 46% annual growth rate. Don't think this is unattainable, in 1995 altr did achieved just over the 10% qtr-qtr growth! So, all i wanted to do was shed some light on the series of calculations you use all based on the 23% project growth rate. Margins too have stabelized and should minimally remain there.
i would have done the calculation i requested based on the higher growth rates, but your description i think was missing what you eventually multiply the compounded rates by. ie: 1.2 x ? for current base value.
comments welcome and no i don't work for xlnx. schlep |