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Technology Stocks : Newbridge Networks
NN 11.97+5.3%Nov 21 9:30 AM EST

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To: Doug who wrote (11207)5/6/1999 12:21:00 PM
From: gbh  Read Replies (1) of 18016
 
Doug, as an ASIC designer (for the last 14 years) for networking products (for the last 5 years), let me just say (nicely) that your understanding here is a tad lacking.

First, when an architect decides that a new function will require an ASIC (and here I distinguish ASIC from FPGA), a determination is made whether the ASIC will include library "cores" or will be completely random logic. Cores would include things such as embedded memory, processors, DSP, or other specialized functions (math, PCI, Utopia bus, etc). Once a need goes beyond simple embedded memories (which is very common today), finding even two ASIC vendors with compatible core elememts is futile. Core offerings are how ASIC vendors are distinguising themselves today.

So right off the bat, "cores" can dictate vendor selection. If vendor A has a complex core available, but no other vendor does, I will never sacrifice time to market designing that fucntion myself.

But lets assume the ASIC is entirely random logic. So now it is possible to perhaps second source an ASIC. "Possible" is the key word here. In order to second source the design, the design coding (VHDL or Verilog) is about the only piece that is portable since today's ASIC are all synthesized from code to gates. And since the synthesis/timing of a high function ASIC is tough enough, targeting multiple vendor libraries during synthesis isn't generally feasible. Time to market and human resources again dictate what is feasible and what isn't. Beyond synthesis, real timing isn't actually obtained until a design is actually placed and routed, which is after vendor selection and at least a partial payment for the contract award. No company I have ever heard of awards contracts to multiple vendors to supply the same ASIC design. It just isn't cost effective since the volumes jsut aren't high enough, and probably more important, the time to market impact makes it non-feasible.

But an ASIC is only one component. The ASSP type chips I mentioned make second sourcing the complex components in today's networking gear impossible; plain and simple.

Gary
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