SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: kash johal who wrote (59843)5/28/1999 9:58:00 AM
From: Shane Geary  Read Replies (1) of 1573922
 
Kash - Re" No way in H*ll they are going to yield 56 DPW with that die size. Think maybe 1/2 that and it still would be great for starting out."

(i) "Hell" isn't a dirty word.

(ii) It is very difficult to predict defect-limited yield, but I would say that >50% yield loss due to defects is dreadful (even early in the learning curve) and that AMD should do a lot better than that. Speed bin yield on the other hand - who knows. However, the indications appear to be that 500Mhz is easy enough to achieve (someone said that not many 500Mhz chips would be made).

I am going out on a major limb here, but I would say that after 1 quarter, >>50% 500Mhz yield will be achieved. Boy I'm going to regret that!
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext